Date: | 2010-06-01 00:34:46 (13 years 9 months ago) |
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Author: | Lars C. |
Commit: | 8d67a585e692dedfefc36d0a28afe4b19958dff2 |
Message: | jz4740: GPIO: Small cleanups |
Files: |
arch/mips/jz4740/gpio.c (5 diffs) |
Change Details
arch/mips/jz4740/gpio.c | ||
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45 | 45 | #define JZ4740_IRQ_GPIO_BASE_C (JZ4740_IRQ_GPIO(0) + JZ4740_GPIO_BASE_C) |
46 | 46 | #define JZ4740_IRQ_GPIO_BASE_D (JZ4740_IRQ_GPIO(0) + JZ4740_GPIO_BASE_D) |
47 | 47 | |
48 | #define JZ4740_IRQ_GPIO_A(num) (JZ4740_IRQ_GPIO_BASE_A + num) | |
49 | #define JZ4740_IRQ_GPIO_B(num) (JZ4740_IRQ_GPIO_BASE_B + num) | |
50 | #define JZ4740_IRQ_GPIO_C(num) (JZ4740_IRQ_GPIO_BASE_C + num) | |
51 | #define JZ4740_IRQ_GPIO_D(num) (JZ4740_IRQ_GPIO_BASE_D + num) | |
52 | ||
53 | 48 | #define JZ_REG_GPIO_PIN 0x00 |
54 | 49 | #define JZ_REG_GPIO_DATA 0x10 |
55 | 50 | #define JZ_REG_GPIO_DATA_SET 0x14 |
... | ... | |
275 | 270 | } |
276 | 271 | EXPORT_SYMBOL(jz_gpio_port_get_value); |
277 | 272 | |
273 | int gpio_to_irq(unsigned gpio) | |
274 | { | |
275 | return JZ4740_IRQ_GPIO(0) + gpio; | |
276 | } | |
277 | EXPORT_SYMBOL_GPL(gpio_to_irq); | |
278 | 278 | |
279 | #define IRQ_TO_GPIO(irq) (irq - JZ4740_IRQ_GPIO(0)) | |
280 | #define IRQ_TO_BIT(irq) BIT(IRQ_TO_GPIO(irq) & 0x1f) | |
279 | int irq_to_gpio(unsigned irq) | |
280 | { | |
281 | return irq - JZ4740_IRQ_GPIO(0); | |
282 | } | |
283 | EXPORT_SYMBOL_GPL(irq_to_gpio); | |
284 | ||
285 | #define IRQ_TO_BIT(irq) BIT(irq_to_gpio(irq) & 0x1f) | |
281 | 286 | |
282 | 287 | static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) |
283 | 288 | { |
... | ... | |
310 | 315 | |
311 | 316 | static inline void jz_gpio_set_irq_bit(unsigned int irq, unsigned int reg) |
312 | 317 | { |
313 | struct jz_gpio_chip *chip = get_irq_data(desc); | |
318 | struct jz_gpio_chip *chip = get_irq_data(irq); | |
314 | 319 | writel(IRQ_TO_BIT(irq), chip->base + reg); |
315 | 320 | } |
316 | 321 | |
317 | 322 | static void jz_gpio_irq_mask(unsigned int irq) |
318 | 323 | { |
319 | struct jz_gpio_chip *chip = get_irq_data(desc); | |
320 | 324 | jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_SET); |
321 | 325 | }; |
322 | 326 | |
... | ... | |
415 | 419 | return 0; |
416 | 420 | } |
417 | 421 | |
418 | int gpio_to_irq(unsigned gpio) | |
419 | { | |
420 | return JZ4740_IRQ_GPIO(0) + gpio; | |
421 | } | |
422 | EXPORT_SYMBOL_GPL(gpio_to_irq); | |
423 | ||
424 | int irq_to_gpio(unsigned gpio) | |
425 | { | |
426 | return IRQ_TO_GPIO(gpio); | |
427 | } | |
428 | EXPORT_SYMBOL_GPL(irq_to_gpio); | |
429 | ||
430 | 422 | /* |
431 | 423 | * This lock class tells lockdep that GPIO irqs are in a different |
432 | 424 | * category than their parents, so it won't report false recursion. |
... | ... | |
536 | 528 | if (ret) |
537 | 529 | return ret; |
538 | 530 | |
539 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) { | |
531 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) | |
540 | 532 | jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); |
541 | } | |
542 | 533 | |
543 | 534 | printk(KERN_INFO "JZ4740 GPIO initalized\n"); |
544 | 535 |
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
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