Date: | 2012-09-13 00:09:20 (11 years 6 months ago) |
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Author: | Paul Cercueil |
Commit: | 5afecbf0ed2a374bd9d6cf68d55ad71a225ad4ac |
Message: | RTC: JZ4740: Init the "regulator" register on startup. This register controls the accuracy of the RTC. uC/OS-II use the RTC as a 100Hz clock, and writes a completely wrong value on that register, that we have to overwrite if we want a working real-time clock. Signed-off-by: Paul Cercueil <paul@crapouillou.net> |
Files: |
drivers/rtc/rtc-jz4740.c (3 diffs) |
Change Details
drivers/rtc/rtc-jz4740.c | ||
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14 | 14 | * |
15 | 15 | */ |
16 | 16 | |
17 | #include <linux/clk.h> | |
17 | 18 | #include <linux/kernel.h> |
18 | 19 | #include <linux/module.h> |
19 | 20 | #include <linux/platform_device.h> |
... | ... | |
215 | 216 | int ret; |
216 | 217 | struct jz4740_rtc *rtc; |
217 | 218 | uint32_t scratchpad; |
219 | struct clk *rtc_clk; | |
218 | 220 | |
219 | 221 | rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); |
220 | 222 | if (!rtc) |
... | ... | |
280 | 282 | } |
281 | 283 | } |
282 | 284 | |
285 | rtc_clk = clk_get(&pdev->dev, "rtc"); | |
286 | if (IS_ERR(rtc_clk)) { | |
287 | dev_err(&pdev->dev, "Failed to get RTC clock\n"); | |
288 | goto err_free_irq; | |
289 | } | |
290 | ||
291 | /* TODO: initialize the ADJC bits (25:16) to fine-tune | |
292 | * the accuracy of the RTC */ | |
293 | ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_REGULATOR, | |
294 | (clk_get_rate(rtc_clk) - 1) & 0xffff); | |
295 | clk_put(rtc_clk); | |
296 | ||
297 | if (ret) | |
298 | dev_warn(&pdev->dev, "Could not update RTC regulator register\n"); | |
299 | ||
283 | 300 | return 0; |
284 | 301 | |
285 | 302 | err_free_irq: |
Branches:
ben-wpan
ben-wpan-stefan
5396a9238205f20f811ea57898980d3ca82df0b6
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
jz-3.13
jz-3.15
jz-3.16
jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9