Date:2010-05-18 19:49:41 (13 years 10 months ago)
Author:CongoZombie
Commit:3b37e76171e7030dd30938892f4c11c70529acb2
Message:Revert commit "Added JZ_RISC specific code from the Ingenic kernel used by BooBoo" Seems that this is redundant

This reverts commit 326ac0ec82059d5c11197882bf1c857ac14361ad.
Files: arch/mips/mm/c-r4k.c (1 diff)

Change Details

arch/mips/mm/c-r4k.c
928928        c->dcache.waybit = 0;
929929        break;
930930
931    case CPU_JZRISC:
932        config1 = read_c0_config1();
933        config1 = (config1 >> 22) & 0x07;
934        if (config1 == 0x07)
935            config1 = 10;
936        else
937            config1 = config1 + 11;
938        config1 += 2;
939        icache_size = (1 << config1);
940        c->icache.linesz = 32;
941        c->icache.ways = 4;
942        c->icache.waybit = __ffs(icache_size / c->icache.ways);
943
944        config1 = read_c0_config1();
945        config1 = (config1 >> 13) & 0x07;
946        if (config1 == 0x07)
947            config1 = 10;
948        else
949            config1 = config1 + 11;
950        config1 += 2;
951        dcache_size = (1 << config1);
952        c->dcache.linesz = 32;
953        c->dcache.ways = 4;
954        c->dcache.waybit = __ffs(dcache_size / c->dcache.ways);
955
956        c->dcache.flags = 0;
957        c->options |= MIPS_CPU_PREFETCH;
958
959        break;
960
961931    default:
962932        if (!(config & MIPS_CONF_M))
963933            panic("Don't know how to probe P-caches on this cpu.");

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