Date:2010-07-14 20:25:06 (13 years 8 months ago)
Author:Lars C.
Commit:1b3e64ae72a98fd5945a255570e9cc7bfe3b918f
Message:MTD: nand: jz4740: supply memory bank address through platform resource

Files: drivers/mtd/nand/jz4740_nand.c (9 diffs)

Change Details

drivers/mtd/nand/jz4740_nand.c
5252#define JZ_NAND_CTRL_ENABLE_CHIP(x) BIT(x << 1)
5353#define JZ_NAND_CTRL_ASSERT_CHIP(x) BIT((x << 1) + 1)
5454
55#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB8000000)
56#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
57#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x10000)
58
5955struct jz_nand {
6056    struct mtd_info mtd;
6157    struct nand_chip chip;
6258    void __iomem *base;
6359    struct resource *mem;
6460
61    void __iomem *bank_base;
62    struct resource *bank_mem;
63
6564    struct jz_nand_platform_data *pdata;
6665    bool is_reading;
6766};
...... 
7170    return container_of(mtd, struct jz_nand, mtd);
7271}
7372
73#define JZ_NAND_MEM_ADDR_OFFSET 0x10000
74#define JZ_NAND_MEM_CMD_OFFSET 0x08000
75
7476static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl)
7577{
7678    struct jz_nand *nand = mtd_to_jz_nand(mtd);
...... 
8082    if (ctrl & NAND_CTRL_CHANGE) {
8183        BUG_ON((ctrl & NAND_ALE) && (ctrl & NAND_CLE));
8284        if (ctrl & NAND_ALE)
83            chip->IO_ADDR_W = JZ_NAND_ADDR_ADDR;
85            chip->IO_ADDR_W = nand->bank_base + JZ_NAND_MEM_ADDR_OFFSET;
8486        else if (ctrl & NAND_CLE)
85            chip->IO_ADDR_W = JZ_NAND_CMD_ADDR;
87            chip->IO_ADDR_W = nand->bank_base + JZ_NAND_MEM_CMD_OFFSET;
8688        else
87            chip->IO_ADDR_W = JZ_NAND_DATA_ADDR;
89            chip->IO_ADDR_W = nand->bank_base;
8890
8991        reg = readl(nand->base + JZ_REG_NAND_CTRL);
9092        if (ctrl & NAND_NCE)
...... 
296298static const char *part_probes[] = {"cmdline", NULL};
297299#endif
298300
301static int jz_nand_ioremap_resource(struct platform_device *pdev,
302    const char *name, struct resource **res, void __iomem **base)
303{
304    int ret;
305
306    *res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
307    if (!*res) {
308        dev_err(&pdev->dev, "Failed to get platform %s memory\n", name);
309        ret = -ENXIO;
310        goto err;
311    }
312
313    *res = request_mem_region((*res)->start, resource_size(*res),
314                pdev->name);
315    if (!*res) {
316        dev_err(&pdev->dev, "Failed to request %s memory region\n", name);
317        ret = -EBUSY;
318        goto err;
319    }
320
321    *base = ioremap((*res)->start, resource_size(*res));
322    if (!*base) {
323        dev_err(&pdev->dev, "Failed to ioremap %s memory region\n", name);
324        ret = -EBUSY;
325        goto err_release_mem;
326    }
327
328    return 0;
329
330err_release_mem:
331    release_mem_region((*res)->start, resource_size(*res));
332err:
333    *res = NULL;
334    *base = NULL;
335    return ret;
336}
337
299338static int __devinit jz_nand_probe(struct platform_device *pdev)
300339{
301340    int ret;
...... 
314353        return -ENOMEM;
315354    }
316355
317    nand->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
318    if (!nand->mem) {
319        dev_err(&pdev->dev, "Failed to get platform mmio memory\n");
320        ret = -ENXIO;
356    ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);
357    if (ret)
321358        goto err_free;
322    }
323
324    nand->mem = request_mem_region(nand->mem->start,
325                    resource_size(nand->mem), pdev->name);
326    if (!nand->mem) {
327        dev_err(&pdev->dev, "Failed to request mmio memory region\n");
328        ret = -EBUSY;
329        goto err_free;
330    }
331
332    nand->base = ioremap(nand->mem->start, resource_size(nand->mem));
333    if (!nand->base) {
334        dev_err(&pdev->dev, "Failed to ioremap mmio memory region\n");
335        ret = -EBUSY;
336        goto err_release_mem;
337    }
359    ret = jz_nand_ioremap_resource(pdev, "bank", &nand->bank_mem,
360            &nand->bank_base);
361    if (ret)
362        goto err_iounmap_mmio;
338363
339364    if (pdata && gpio_is_valid(pdata->busy_gpio)) {
340365        ret = gpio_request(pdata->busy_gpio, "NAND busy pin");
...... 
342367            dev_err(&pdev->dev,
343368                "Failed to request busy gpio %d: %d\n",
344369                pdata->busy_gpio, ret);
345            goto err_iounmap;
370            goto err_iounmap_mem;
346371        }
347372    }
348373
...... 
371396    if (pdata && gpio_is_valid(pdata->busy_gpio))
372397        chip->dev_ready = jz_nand_dev_ready;
373398
374    chip->IO_ADDR_R = JZ_NAND_DATA_ADDR;
375    chip->IO_ADDR_W = JZ_NAND_DATA_ADDR;
399    chip->IO_ADDR_R = nand->bank_base;
400    chip->IO_ADDR_W = nand->bank_base;
376401
377402    nand->pdata = pdata;
378403    platform_set_drvdata(pdev, nand);
...... 
418443    dev_info(&pdev->dev, "Successfully registered JZ4740 NAND driver\n");
419444
420445    return 0;
446
421447err_nand_release:
422448    nand_release(&nand->mtd);
423449err_gpio_free:
424450    platform_set_drvdata(pdev, NULL);
425451    gpio_free(pdata->busy_gpio);
426err_iounmap:
452err_iounmap_mem:
453    iounmap(nand->bank_base);
454err_iounmap_mmio:
427455    iounmap(nand->base);
428err_release_mem:
429    release_mem_region(nand->mem->start, resource_size(nand->mem));
430456err_free:
431457    kfree(nand);
432458    return ret;
...... 
438464
439465    nand_release(&nand->mtd);
440466
467    iounmap(nand->bank_base);
468    release_mem_region(nand->bank_mem->start, resource_size(nand->bank_mem));
441469    iounmap(nand->base);
442470    release_mem_region(nand->mem->start, resource_size(nand->mem));
443471

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