target/linux/ar71xx/files/arch/mips/ar71xx/devices.c |
22 | 22 | |
23 | 23 | #include "devices.h" |
24 | 24 | |
25 | | static u8 ar71xx_mac_base[ETH_ALEN] __initdata; |
| 25 | unsigned char ar71xx_mac_base[ETH_ALEN] __initdata; |
26 | 26 | |
27 | 27 | static struct resource ar71xx_uart_resources[] = { |
28 | 28 | { |
... | ... | |
490 | 490 | break; |
491 | 491 | } |
492 | 492 | |
493 | | if (is_valid_ether_addr(ar71xx_mac_base)) { |
494 | | memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN); |
495 | | pdata->mac_addr[5] += ar71xx_eth_instance; |
496 | | } else { |
| 493 | if (!is_valid_ether_addr(pdata->mac_addr)) { |
497 | 494 | random_ether_addr(pdata->mac_addr); |
498 | 495 | printk(KERN_DEBUG |
499 | 496 | "ar71xx: using random MAC address for eth%d\n", |
... | ... | |
580 | 577 | return 1; |
581 | 578 | } |
582 | 579 | __setup("kmac=", ar71xx_kmac_setup); |
| 580 | |
| 581 | void __init ar71xx_init_mac(unsigned char *dst, const unsigned char *src, |
| 582 | unsigned offset) |
| 583 | { |
| 584 | u32 t; |
| 585 | |
| 586 | if (!is_valid_ether_addr(src)) { |
| 587 | memset(dst, '\0', ETH_ALEN); |
| 588 | return; |
| 589 | } |
| 590 | |
| 591 | t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); |
| 592 | t += offset; |
| 593 | |
| 594 | dst[0] = src[0]; |
| 595 | dst[1] = src[1]; |
| 596 | dst[2] = src[2]; |
| 597 | dst[3] = (t >> 16) & 0xff; |
| 598 | dst[4] = (t >> 8) & 0xff; |
| 599 | dst[5] = t & 0xff; |
| 600 | } |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap81.c |
109 | 109 | { |
110 | 110 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
111 | 111 | |
112 | | ar71xx_set_mac_base(eeprom); |
113 | 112 | ar71xx_add_device_mdio(0x0); |
114 | 113 | |
| 114 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); |
115 | 115 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
116 | 116 | ar71xx_eth0_data.speed = SPEED_100; |
117 | 117 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
118 | 118 | ar71xx_eth0_data.has_ar8216 = 1; |
119 | 119 | |
| 120 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); |
120 | 121 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
121 | 122 | ar71xx_eth1_data.phy_mask = 0x10; |
122 | 123 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap83.c |
196 | 196 | { |
197 | 197 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
198 | 198 | |
199 | | ar71xx_set_mac_base(eeprom); |
200 | | |
201 | 199 | ar71xx_add_device_mdio(0xfffffffe); |
202 | 200 | |
| 201 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); |
203 | 202 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
204 | 203 | ar71xx_eth0_data.phy_mask = 0x1; |
205 | 204 | |
206 | 205 | ar71xx_add_device_eth(0); |
207 | 206 | |
| 207 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); |
208 | 208 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
209 | 209 | ar71xx_eth1_data.speed = SPEED_1000; |
210 | 210 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-600-a1.c |
118 | 118 | u8 *mac = NULL; |
119 | 119 | |
120 | 120 | if (nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, |
121 | | "lan_mac=", mac_buff) == 0) |
| 121 | "lan_mac=", mac_buff) == 0) { |
| 122 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
| 123 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); |
122 | 124 | mac = mac_buff; |
| 125 | } |
123 | 126 | |
124 | 127 | ar71xx_add_device_m25p80(&dir_600_a1_flash_data); |
125 | 128 | |
... | ... | |
130 | 133 | ARRAY_SIZE(dir_600_a1_gpio_buttons), |
131 | 134 | dir_600_a1_gpio_buttons); |
132 | 135 | |
133 | | ap91_eth_init(mac, NULL); |
| 136 | ap91_eth_init(NULL); |
134 | 137 | ap91_pci_init(ee, mac); |
135 | 138 | } |
136 | 139 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-dir-825-b1.c |
145 | 145 | |
146 | 146 | static void __init dir825b1_setup(void) |
147 | 147 | { |
148 | | u8 mac[6], i; |
149 | | |
150 | | memcpy(mac, (u8*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6); |
151 | | for(i = 5; i >= 3; i--) |
152 | | if(++mac[i] != 0x00) break; |
153 | | |
154 | | ar71xx_set_mac_base(mac); |
| 148 | u8 *mac = (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_1); |
155 | 149 | |
156 | 150 | ar71xx_add_device_mdio(0x0); |
157 | 151 | |
| 152 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1); |
158 | 153 | ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; |
159 | 154 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
160 | 155 | ar71xx_eth0_data.speed = SPEED_1000; |
161 | 156 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
162 | 157 | ar71xx_eth0_pll_data.pll_1000 = 0x11110000; |
163 | 158 | |
| 159 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 2); |
164 | 160 | ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; |
165 | 161 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
166 | 162 | ar71xx_eth1_data.phy_mask = 0x10; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-eap7660d.c |
145 | 145 | static void __init eap7660d_setup(void) |
146 | 146 | { |
147 | 147 | u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); |
148 | | ar71xx_set_mac_base(boardconfig + EAP7660D_GBIC_MAC_OFFSET); |
| 148 | |
149 | 149 | ar71xx_add_device_mdio(~EAP7660D_PHYMASK); |
| 150 | |
| 151 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, |
| 152 | boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); |
150 | 153 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
151 | 154 | ar71xx_eth0_data.phy_mask = EAP7660D_PHYMASK; |
152 | 155 | ar71xx_add_device_eth(0); |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w04nu.c |
133 | 133 | { |
134 | 134 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
135 | 135 | |
136 | | ar71xx_set_mac_base(eeprom); |
137 | | |
138 | 136 | ar71xx_add_device_mdio(MZK_W04NU_MDIO_MASK); |
139 | 137 | |
| 138 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); |
140 | 139 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
141 | 140 | ar71xx_eth0_data.speed = SPEED_100; |
142 | 141 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
143 | 142 | ar71xx_eth0_data.has_ar8216 = 1; |
144 | 143 | |
| 144 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); |
145 | 145 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
146 | 146 | ar71xx_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; |
147 | 147 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-mzk-w300nh.c |
128 | 128 | { |
129 | 129 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
130 | 130 | |
131 | | ar71xx_set_mac_base(eeprom); |
132 | | |
133 | 131 | ar71xx_add_device_mdio(MZK_W300NH_MDIO_MASK); |
134 | 132 | |
| 133 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); |
135 | 134 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
136 | 135 | ar71xx_eth0_data.speed = SPEED_100; |
137 | 136 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
138 | 137 | ar71xx_eth0_data.has_ar8216 = 1; |
139 | 138 | |
| 139 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); |
140 | 140 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
141 | 141 | ar71xx_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; |
142 | 142 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-nbg460n.c |
184 | 184 | /* last sector contains wlan calib data */ |
185 | 185 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
186 | 186 | |
187 | | ar71xx_set_mac_base(mac); |
188 | | |
189 | 187 | /* LAN Port */ |
| 188 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
190 | 189 | ar71xx_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; |
191 | 190 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
192 | 191 | ar71xx_eth0_data.speed = SPEED_1000; |
193 | 192 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
194 | 193 | |
195 | 194 | /* WAN Port */ |
| 195 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); |
196 | 196 | ar71xx_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; |
197 | 197 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
198 | 198 | ar71xx_eth1_data.phy_mask = 0x10; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c |
51 | 51 | |
52 | 52 | ar71xx_add_device_mdio(~PB42_MDIO_PHYMASK); |
53 | 53 | |
| 54 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
54 | 55 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
55 | 56 | ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK; |
56 | 57 | |
| 58 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
57 | 59 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
58 | 60 | ar71xx_eth1_data.speed = SPEED_100; |
59 | 61 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c |
173 | 173 | { |
174 | 174 | ar71xx_add_device_mdio(~PB44_MDIO_PHYMASK); |
175 | 175 | |
| 176 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
176 | 177 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
177 | 178 | ar71xx_eth0_data.phy_mask = PB44_WAN_PHYMASK; |
178 | 179 | |
179 | 180 | ar71xx_add_device_eth(0); |
180 | 181 | |
| 182 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
181 | 183 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
182 | 184 | ar71xx_eth1_data.speed = SPEED_1000; |
183 | 185 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c |
84 | 84 | { |
85 | 85 | u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); |
86 | 86 | |
87 | | ar71xx_set_mac_base(mac); |
88 | 87 | ar71xx_add_device_m25p80(&pb92_flash_data); |
89 | 88 | |
90 | 89 | ar71xx_add_device_mdio(~0); |
| 90 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
91 | 91 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
92 | 92 | ar71xx_eth0_data.speed = SPEED_1000; |
93 | 93 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
94 | 94 | |
| 95 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); |
95 | 96 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
96 | 97 | ar71xx_eth1_data.speed = SPEED_1000; |
97 | 98 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb4xx.c |
179 | 179 | |
180 | 180 | ar71xx_add_device_mdio(0xfffffffc); |
181 | 181 | |
| 182 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
182 | 183 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
183 | 184 | ar71xx_eth0_data.phy_mask = 0x00000003; |
184 | 185 | |
... | ... | |
210 | 211 | |
211 | 212 | ar71xx_add_device_mdio(~RB433_MDIO_PHYMASK); |
212 | 213 | |
| 214 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); |
213 | 215 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
214 | 216 | ar71xx_eth0_data.phy_mask = RB433_LAN_PHYMASK; |
215 | 217 | |
| 218 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); |
216 | 219 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
217 | 220 | ar71xx_eth1_data.phy_mask = RB433_WAN_PHYMASK; |
218 | 221 | |
... | ... | |
245 | 248 | |
246 | 249 | ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK); |
247 | 250 | |
| 251 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); |
248 | 252 | ar71xx_eth0_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; |
249 | 253 | ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK; |
250 | 254 | |
| 255 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); |
251 | 256 | ar71xx_eth1_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; |
252 | 257 | ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK; |
253 | 258 | |
... | ... | |
278 | 283 | |
279 | 284 | ar71xx_add_device_mdio(0x3fffff00); |
280 | 285 | |
| 286 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
281 | 287 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
282 | 288 | ar71xx_eth0_data.speed = SPEED_100; |
283 | 289 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
284 | 290 | |
| 291 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
285 | 292 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
286 | 293 | ar71xx_eth1_data.phy_mask = 0x00000001; |
287 | 294 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-rb750.c |
13 | 13 | #include <asm/mach-ar71xx/mach-rb750.h> |
14 | 14 | |
15 | 15 | #include "machtype.h" |
| 16 | #include "devices.h" |
16 | 17 | #include "dev-ap91-eth.h" |
17 | 18 | |
18 | 19 | static struct rb750_led_data rb750_leds[] = { |
... | ... | |
124 | 125 | AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | |
125 | 126 | AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); |
126 | 127 | |
127 | | ap91_eth_init(NULL, rb750_port_names); |
| 128 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
| 129 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
| 130 | ap91_eth_init(rb750_port_names); |
| 131 | |
128 | 132 | platform_device_register(&rb750_leds_device); |
129 | 133 | platform_device_register(&rb750_nand_device); |
130 | 134 | } |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wa901nd.c |
110 | 110 | u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); |
111 | 111 | u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); |
112 | 112 | |
113 | | ar71xx_set_mac_base(mac); |
114 | | |
115 | 113 | /* |
116 | 114 | * ar71xx_eth0 would be the WAN port, but is not connected on |
117 | 115 | * the TL-WA901ND. ar71xx_eth1 connects to the internal switch chip, |
118 | 116 | * however we have a single LAN port only. |
119 | 117 | */ |
| 118 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 0); |
120 | 119 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
121 | 120 | ar71xx_eth1_data.speed = SPEED_1000; |
122 | 121 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr941nd.c |
116 | 116 | u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); |
117 | 117 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
118 | 118 | |
119 | | ar71xx_set_mac_base(mac); |
120 | | |
121 | 119 | ar71xx_add_device_mdio(0x0); |
122 | 120 | |
| 121 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
123 | 122 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
124 | 123 | ar71xx_eth0_data.speed = SPEED_100; |
125 | 124 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c |
142 | 142 | |
143 | 143 | ar71xx_add_device_mdio(~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); |
144 | 144 | |
| 145 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
145 | 146 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
146 | 147 | ar71xx_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; |
147 | 148 | |
| 149 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
148 | 150 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
149 | 151 | ar71xx_eth1_data.speed = SPEED_100; |
150 | 152 | ar71xx_eth1_data.duplex = DUPLEX_FULL; |
... | ... | |
170 | 172 | |
171 | 173 | ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK | UBNT_RSPRO_LAN_PHYMASK)); |
172 | 174 | |
| 175 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
173 | 176 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
174 | 177 | ar71xx_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; |
175 | 178 | |
| 179 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1); |
176 | 180 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
177 | 181 | ar71xx_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; |
178 | 182 | ar71xx_eth1_data.speed = SPEED_1000; |
... | ... | |
205 | 209 | |
206 | 210 | ar71xx_add_device_mdio(~UBNT_LSSR71_PHY_MASK); |
207 | 211 | |
| 212 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); |
208 | 213 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
209 | 214 | ar71xx_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; |
210 | 215 | |
... | ... | |
222 | 227 | u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); |
223 | 228 | u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); |
224 | 229 | |
225 | | ar71xx_set_mac_base(mac); |
226 | | |
227 | 230 | ar71xx_add_device_m25p80(NULL); |
228 | 231 | |
229 | 232 | ar71xx_add_device_mdio(~0); |
230 | 233 | |
| 234 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
| 235 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); |
231 | 236 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
232 | 237 | ar71xx_eth0_data.speed = SPEED_100; |
233 | 238 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wndr3700.c |
168 | 168 | { |
169 | 169 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
170 | 170 | |
171 | | ar71xx_set_mac_base(art); |
172 | | |
| 171 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art, 0); |
173 | 172 | ar71xx_eth0_pll_data.pll_1000 = 0x11110000; |
174 | 173 | ar71xx_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; |
175 | 174 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
176 | 175 | ar71xx_eth0_data.speed = SPEED_1000; |
177 | 176 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
178 | 177 | |
| 178 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art, 1); |
179 | 179 | ar71xx_eth1_pll_data.pll_1000 = 0x11110000; |
180 | 180 | ar71xx_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; |
181 | 181 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wnr2000.c |
118 | 118 | { |
119 | 119 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
120 | 120 | |
121 | | ar71xx_set_mac_base(eeprom); |
122 | 121 | ar71xx_add_device_mdio(0x0); |
123 | 122 | |
| 123 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0); |
124 | 124 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
125 | 125 | ar71xx_eth0_data.speed = SPEED_100; |
126 | 126 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
127 | 127 | ar71xx_eth0_data.has_ar8216 = 1; |
128 | 128 | |
| 129 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1); |
129 | 130 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
130 | 131 | ar71xx_eth1_data.phy_mask = 0x10; |
131 | 132 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt160nl.c |
121 | 121 | u8 mac[6]; |
122 | 122 | |
123 | 123 | if (nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, |
124 | | "lan_hwaddr=", mac) == 0) |
125 | | ar71xx_set_mac_base(mac); |
| 124 | "lan_hwaddr=", mac) == 0) { |
| 125 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
| 126 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); |
| 127 | } |
126 | 128 | |
127 | 129 | ar71xx_add_device_mdio(0x0); |
128 | 130 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c |
131 | 131 | static void __init wrt400n_setup(void) |
132 | 132 | { |
133 | 133 | u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
134 | | u8 mac[6]; |
135 | | int i; |
136 | | |
137 | | memcpy(mac, art + WRT400N_MAC_ADDR_OFFSET, 6); |
138 | | for (i = 5; i >= 3; i--) |
139 | | if (++mac[i] != 0x00) break; |
140 | | |
141 | | ar71xx_set_mac_base(mac); |
| 134 | u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; |
142 | 135 | |
143 | 136 | ar71xx_add_device_mdio(0x0); |
144 | 137 | |
| 138 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1); |
145 | 139 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
146 | 140 | ar71xx_eth0_data.speed = SPEED_100; |
147 | 141 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
148 | 142 | |
| 143 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 2); |
149 | 144 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; |
150 | 145 | ar71xx_eth1_data.phy_mask = 0x10; |
151 | 146 | |
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wzr-hp-g300nh.c |
228 | 228 | static void __init wzrhpg300nh_setup(void) |
229 | 229 | { |
230 | 230 | u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); |
| 231 | u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; |
231 | 232 | |
232 | | ar71xx_set_mac_base(eeprom + WZRHPG300NH_MAC_OFFSET); |
233 | | |
| 233 | ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0); |
234 | 234 | ar71xx_eth0_pll_data.pll_1000 = 0x1e000100; |
235 | 235 | ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; |
236 | 236 | ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |
237 | 237 | ar71xx_eth0_data.speed = SPEED_1000; |
238 | 238 | ar71xx_eth0_data.duplex = DUPLEX_FULL; |
239 | 239 | |
| 240 | ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1); |
240 | 241 | ar71xx_eth1_pll_data.pll_1000 = 0x1e000100; |
241 | 242 | ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; |
242 | 243 | ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; |