target/linux/ar7/config-2.6.32 |
1 | 1 | CONFIG_32BIT=y |
2 | 2 | # CONFIG_64BIT is not set |
| 3 | CONFIG_ADM6996_PHY=y |
3 | 4 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set |
| 5 | CONFIG_AR7=y |
4 | 6 | CONFIG_AR7_GPIO=y |
5 | 7 | CONFIG_AR7_WDT=y |
6 | | CONFIG_AR7=y |
7 | 8 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set |
8 | 9 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
9 | 10 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y |
... | ... | |
17 | 18 | CONFIG_BOOT_ELF32=y |
18 | 19 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set |
19 | 20 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set |
20 | | CONFIG_CEVT_R4K_LIB=y |
21 | 21 | CONFIG_CEVT_R4K=y |
| 22 | CONFIG_CEVT_R4K_LIB=y |
22 | 23 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 |
23 | 24 | CONFIG_CMDLINE="rootfstype=squashfs,jffs2" |
24 | 25 | CONFIG_CPMAC=y |
... | ... | |
28 | 29 | CONFIG_CPU_HAS_SYNC=y |
29 | 30 | CONFIG_CPU_LITTLE_ENDIAN=y |
30 | 31 | # CONFIG_CPU_LOONGSON2E is not set |
| 32 | CONFIG_CPU_MIPS32=y |
31 | 33 | CONFIG_CPU_MIPS32_R1=y |
32 | 34 | # CONFIG_CPU_MIPS32_R2 is not set |
33 | | CONFIG_CPU_MIPS32=y |
34 | 35 | # CONFIG_CPU_MIPS64_R1 is not set |
35 | 36 | # CONFIG_CPU_MIPS64_R2 is not set |
36 | 37 | CONFIG_CPU_MIPSR1=y |
... | ... | |
52 | 53 | # CONFIG_CPU_TX39XX is not set |
53 | 54 | # CONFIG_CPU_TX49XX is not set |
54 | 55 | # CONFIG_CPU_VR41XX is not set |
55 | | CONFIG_CSRC_R4K_LIB=y |
56 | 56 | CONFIG_CSRC_R4K=y |
| 57 | CONFIG_CSRC_R4K_LIB=y |
57 | 58 | CONFIG_DECOMPRESS_LZMA=y |
58 | 59 | # CONFIG_DM9000 is not set |
59 | 60 | CONFIG_DMA_NEED_PCI_MAP_STATE=y |
60 | 61 | CONFIG_DMA_NONCOHERENT=y |
61 | 62 | CONFIG_EARLY_PRINTK=y |
62 | | CONFIG_FIXED_PHY=y |
63 | 63 | # CONFIG_FSNOTIFY is not set |
64 | | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
65 | 64 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 65 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
66 | 66 | CONFIG_GENERIC_CMOS_UPDATE=y |
67 | 67 | CONFIG_GENERIC_FIND_LAST_BIT=y |
68 | 68 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
... | ... | |
78 | 78 | CONFIG_HAVE_OPROFILE=y |
79 | 79 | CONFIG_HW_RANDOM=y |
80 | 80 | CONFIG_INITRAMFS_SOURCE="" |
| 81 | CONFIG_IP17XX_PHY=y |
81 | 82 | CONFIG_IRQ_CPU=y |
82 | 83 | CONFIG_KALLSYMS=y |
83 | 84 | CONFIG_LEDS_GPIO=y |
... | ... | |
89 | 90 | # CONFIG_MACH_TX49XX is not set |
90 | 91 | # CONFIG_MACH_VR41XX is not set |
91 | 92 | # CONFIG_MIKROTIK_RB532 is not set |
| 93 | CONFIG_MIPS=y |
92 | 94 | # CONFIG_MIPS_COBALT is not set |
93 | 95 | CONFIG_MIPS_L1_CACHE_SHIFT=5 |
94 | 96 | # CONFIG_MIPS_MACHINE is not set |
... | ... | |
97 | 99 | # CONFIG_MIPS_MT_SMP is not set |
98 | 100 | # CONFIG_MIPS_MT_SMTC is not set |
99 | 101 | # CONFIG_MIPS_SIM is not set |
100 | | CONFIG_MIPS=y |
101 | 102 | CONFIG_MTD_AR7_PARTS=y |
102 | 103 | CONFIG_MTD_CFI_STAA=y |
103 | 104 | CONFIG_MTD_PHYSMAP=y |
| 105 | CONFIG_MVSWITCH_PHY=y |
104 | 106 | CONFIG_NO_EXCEPT_FILL=y |
105 | 107 | # CONFIG_NO_IOPORT is not set |
106 | 108 | # CONFIG_NXP_STB220 is not set |
107 | 109 | # CONFIG_NXP_STB225 is not set |
108 | 110 | CONFIG_PAGEFLAGS_EXTENDED=y |
109 | | # CONFIG_PCI is not set |
110 | 111 | CONFIG_PHYLIB=y |
111 | 112 | # CONFIG_PMC_MSP is not set |
112 | 113 | # CONFIG_PMC_YOSEMITE is not set |
113 | 114 | # CONFIG_PNX8550_JBS is not set |
114 | 115 | # CONFIG_PNX8550_STB810 is not set |
115 | | # CONFIG_PROBE_INITRD_HEADER is not set |
116 | 116 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
117 | 117 | # CONFIG_SCSI_DMA is not set |
118 | 118 | # CONFIG_SERIAL_8250_EXTENDED is not set |
... | ... | |
129 | 129 | # CONFIG_SIBYTE_SENTOSA is not set |
130 | 130 | # CONFIG_SIBYTE_SWARM is not set |
131 | 131 | CONFIG_SWAP_IO_SPACE=y |
| 132 | CONFIG_SWCONFIG=y |
132 | 133 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y |
133 | 134 | CONFIG_SYS_HAS_EARLY_PRINTK=y |
134 | 135 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y |
target/linux/ar7/patches-2.6.32/970-remove_fixed_phy.patch |
| 1 | --- a/arch/mips/ar7/platform.c |
| 2 | @@ -33,7 +33,6 @@ |
| 3 | #include <linux/string.h> |
| 4 | #include <linux/etherdevice.h> |
| 5 | #include <linux/phy.h> |
| 6 | -#include <linux/phy_fixed.h> |
| 7 | |
| 8 | #include <asm/addrspace.h> |
| 9 | #include <asm/mach-ar7/ar7.h> |
| 10 | @@ -294,12 +293,6 @@ static struct physmap_flash_data physmap |
| 11 | .width = 2, |
| 12 | }; |
| 13 | |
| 14 | -static struct fixed_phy_status fixed_phy_status __initdata = { |
| 15 | - .link = 1, |
| 16 | - .speed = 100, |
| 17 | - .duplex = 1, |
| 18 | -}; |
| 19 | - |
| 20 | static struct plat_cpmac_data cpmac_low_data = { |
| 21 | .reset_bit = 17, |
| 22 | .power_bit = 20, |
| 23 | @@ -716,11 +709,6 @@ static int __init ar7_register_devices(v |
| 24 | } |
| 25 | |
| 26 | if (ar7_has_high_cpmac()) { |
| 27 | - res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id, |
| 28 | - &fixed_phy_status); |
| 29 | - if (res && res != -ENODEV) |
| 30 | - return res; |
| 31 | - |
| 32 | cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr : |
| 33 | cpmac_high_data.dev_addr); |
| 34 | res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan : |
| 35 | @@ -736,11 +724,6 @@ static int __init ar7_register_devices(v |
| 36 | |
| 37 | } |
| 38 | |
| 39 | - res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id : |
| 40 | - cpmac_low.id, &fixed_phy_status); |
| 41 | - if (res && res != -ENODEV) |
| 42 | - return res; |
| 43 | - |
| 44 | cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr : |
| 45 | cpmac_low_data.dev_addr); |
| 46 | res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan : |
| 47 | --- a/drivers/net/cpmac.c |
| 48 | @@ -1117,21 +1117,17 @@ static int __devinit cpmac_probe(struct |
| 49 | |
| 50 | pdata = pdev->dev.platform_data; |
| 51 | |
| 52 | - if (external_switch || dumb_switch) { |
| 53 | - strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */ |
| 54 | - phy_id = pdev->id; |
| 55 | - } else { |
| 56 | - for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { |
| 57 | - if (!(pdata->phy_mask & (1 << phy_id))) |
| 58 | - continue; |
| 59 | - if (!cpmac_mii->phy_map[phy_id]) |
| 60 | - continue; |
| 61 | - strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE); |
| 62 | - break; |
| 63 | - } |
| 64 | + for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { |
| 65 | + if (!(pdata->phy_mask & (1 << phy_id))) |
| 66 | + continue; |
| 67 | + if (!cpmac_mii->phy_map[phy_id]) |
| 68 | + continue; |
| 69 | + strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE); |
| 70 | + break; |
| 71 | } |
| 72 | - |
| 73 | + |
| 74 | if (phy_id == PHY_MAX_ADDR) { |
| 75 | + //This probably wont work as no fixed bus anymore. |
| 76 | dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n"); |
| 77 | strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */ |
| 78 | phy_id = pdev->id; |
| 79 | @@ -1268,7 +1264,7 @@ int __devinit cpmac_init(void) |
| 80 | } |
| 81 | |
| 82 | cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000): |
| 83 | - ~(mask | 0x80000000); |
| 84 | + ~(mask | 0x80000001); |
| 85 | snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1"); |
| 86 | |
| 87 | res = mdiobus_register(cpmac_mii); |