target/linux/ixp4xx/config-2.6.33 |
| 1 | # CONFIG_AEABI is not set |
| 2 | CONFIG_ALIGNMENT_TRAP=y |
| 3 | # CONFIG_ARCH_ADI_COYOTE is not set |
| 4 | CONFIG_ARCH_IXCDP1100=y |
| 5 | CONFIG_ARCH_IXDP425=y |
| 6 | CONFIG_ARCH_IXDP4XX=y |
| 7 | CONFIG_ARCH_IXP4XX=y |
| 8 | # CONFIG_ARCH_PRPMC1100 is not set |
| 9 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 10 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 11 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 12 | CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y |
| 13 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
| 14 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 15 | CONFIG_ARM=y |
| 16 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 17 | # CONFIG_ARM_THUMB is not set |
| 18 | # CONFIG_ARPD is not set |
| 19 | CONFIG_BITREVERSE=y |
| 20 | CONFIG_BOUNCE=y |
| 21 | # CONFIG_BSD_PROCESS_ACCT is not set |
| 22 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 23 | CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" |
| 24 | CONFIG_CPU_32v5=y |
| 25 | CONFIG_CPU_ABRT_EV5T=y |
| 26 | CONFIG_CPU_BIG_ENDIAN=y |
| 27 | CONFIG_CPU_CACHE_VIVT=y |
| 28 | CONFIG_CPU_CP15=y |
| 29 | CONFIG_CPU_CP15_MMU=y |
| 30 | CONFIG_CPU_ENDIAN_BE32=y |
| 31 | # CONFIG_CPU_ENDIAN_BE8 is not set |
| 32 | CONFIG_CPU_IXP43X=y |
| 33 | CONFIG_CPU_IXP46X=y |
| 34 | CONFIG_CPU_PABRT_LEGACY=y |
| 35 | CONFIG_CPU_TLB_V4WBI=y |
| 36 | CONFIG_CPU_XSCALE=y |
| 37 | CONFIG_DEBUG_BUGVERBOSE=y |
| 38 | # CONFIG_DEBUG_USER is not set |
| 39 | CONFIG_DECOMPRESS_LZMA=y |
| 40 | CONFIG_DEVPORT=y |
| 41 | # CONFIG_DM9000 is not set |
| 42 | CONFIG_DMABOUNCE=y |
| 43 | CONFIG_DNOTIFY=y |
| 44 | CONFIG_EEPROM_AT24=y |
| 45 | # CONFIG_FPE_FASTFPE is not set |
| 46 | # CONFIG_FPE_NWFPE is not set |
| 47 | CONFIG_FRAME_POINTER=y |
| 48 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 49 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| 50 | CONFIG_GENERIC_FIND_LAST_BIT=y |
| 51 | CONFIG_GENERIC_GPIO=y |
| 52 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 53 | CONFIG_GPIOLIB=y |
| 54 | CONFIG_GPIO_DEVICE=y |
| 55 | CONFIG_GPIO_GW_I2C_PLD=y |
| 56 | CONFIG_GPIO_SYSFS=y |
| 57 | # CONFIG_HAMRADIO is not set |
| 58 | CONFIG_HARDIRQS_SW_RESEND=y |
| 59 | CONFIG_HAS_DMA=y |
| 60 | CONFIG_HAS_IOMEM=y |
| 61 | CONFIG_HAS_IOPORT=y |
| 62 | CONFIG_HAVE_AOUT=y |
| 63 | CONFIG_HAVE_ARCH_KGDB=y |
| 64 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 65 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 66 | CONFIG_HAVE_IDE=y |
| 67 | CONFIG_HAVE_KERNEL_GZIP=y |
| 68 | CONFIG_HAVE_KERNEL_LZO=y |
| 69 | CONFIG_HAVE_KPROBES=y |
| 70 | CONFIG_HAVE_KRETPROBES=y |
| 71 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| 72 | CONFIG_HAVE_MTD_OTP=y |
| 73 | CONFIG_HAVE_OPROFILE=y |
| 74 | CONFIG_HWMON=y |
| 75 | # CONFIG_HWMON_DEBUG_CHIP is not set |
| 76 | CONFIG_HWMON_VID=y |
| 77 | CONFIG_HW_RANDOM=y |
| 78 | CONFIG_HW_RANDOM_IXP4XX=y |
| 79 | CONFIG_I2C=y |
| 80 | CONFIG_I2C_ALGOBIT=y |
| 81 | CONFIG_I2C_BOARDINFO=y |
| 82 | CONFIG_I2C_CHARDEV=y |
| 83 | CONFIG_I2C_GPIO=y |
| 84 | # CONFIG_I2C_IOP3XX is not set |
| 85 | CONFIG_IKCONFIG=y |
| 86 | CONFIG_IKCONFIG_PROC=y |
| 87 | CONFIG_INITRAMFS_SOURCE="" |
| 88 | CONFIG_IP_PIMSM_V1=y |
| 89 | CONFIG_IP_PIMSM_V2=y |
| 90 | # CONFIG_ISDN_CAPI is not set |
| 91 | # CONFIG_ISDN_DRV_GIGASET is not set |
| 92 | # CONFIG_ISDN_I4L is not set |
| 93 | # CONFIG_IWMMXT is not set |
| 94 | CONFIG_IXP4XX_ETH=y |
| 95 | # CONFIG_IXP4XX_INDIRECT_PCI is not set |
| 96 | CONFIG_IXP4XX_LEGACY_DMABOUNCE=y |
| 97 | CONFIG_IXP4XX_NPE=y |
| 98 | CONFIG_IXP4XX_QMGR=y |
| 99 | CONFIG_IXP4XX_WATCHDOG=y |
| 100 | CONFIG_KERNEL_GZIP=y |
| 101 | # CONFIG_KERNEL_LZMA is not set |
| 102 | CONFIG_LEDS_FSG=y |
| 103 | CONFIG_LEDS_GPIO=y |
| 104 | CONFIG_LEDS_LATCH=y |
| 105 | CONFIG_LEGACY_PTYS=y |
| 106 | CONFIG_LEGACY_PTY_COUNT=256 |
| 107 | CONFIG_MACH_AP1000=y |
| 108 | CONFIG_MACH_AVILA=y |
| 109 | CONFIG_MACH_CAMBRIA=y |
| 110 | CONFIG_MACH_COMPEX=y |
| 111 | CONFIG_MACH_DSMG600=y |
| 112 | CONFIG_MACH_FSG=y |
| 113 | CONFIG_MACH_GATEWAY7001=y |
| 114 | # CONFIG_MACH_GORAMO_MLR is not set |
| 115 | # CONFIG_MACH_GTWX5715 is not set |
| 116 | # CONFIG_MACH_IXDP465 is not set |
| 117 | CONFIG_MACH_IXDPG425=y |
| 118 | # CONFIG_MACH_KIXRP435 is not set |
| 119 | CONFIG_MACH_LOFT=y |
| 120 | CONFIG_MACH_MI424WR=y |
| 121 | CONFIG_MACH_NAS100D=y |
| 122 | CONFIG_MACH_NSLU2=y |
| 123 | CONFIG_MACH_PRONGHORN=y |
| 124 | CONFIG_MACH_PRONGHORNMETRO=y |
| 125 | CONFIG_MACH_SIDEWINDER=y |
| 126 | CONFIG_MACH_TW2662=y |
| 127 | CONFIG_MACH_TW5334=y |
| 128 | CONFIG_MACH_USR8200=y |
| 129 | CONFIG_MACH_WG302V1=y |
| 130 | CONFIG_MACH_WG302V2=y |
| 131 | CONFIG_MACH_WRT300NV2=y |
| 132 | CONFIG_MTD_CFI_ADV_OPTIONS=y |
| 133 | # CONFIG_MTD_CFI_GEOMETRY is not set |
| 134 | CONFIG_MTD_IXP4XX=y |
| 135 | CONFIG_MTD_OTP=y |
| 136 | CONFIG_MTD_REDBOOT_PARTS=y |
| 137 | CONFIG_NO_HZ=y |
| 138 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 139 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 140 | CONFIG_PCI=y |
| 141 | CONFIG_PCI_DISABLE_COMMON_QUIRKS=y |
| 142 | CONFIG_PHYLIB=y |
| 143 | CONFIG_RTC_CLASS=y |
| 144 | CONFIG_RTC_DRV_DS1672=y |
| 145 | CONFIG_RTC_DRV_ISL1208=y |
| 146 | CONFIG_RTC_DRV_PCF8563=y |
| 147 | CONFIG_RTC_DRV_X1205=y |
| 148 | # CONFIG_SCSI_DMA is not set |
| 149 | CONFIG_SENSORS_AD7418=y |
| 150 | CONFIG_SENSORS_MAX6650=y |
| 151 | CONFIG_SENSORS_W83781D=y |
| 152 | # CONFIG_SERIAL_8250_EXTENDED is not set |
| 153 | CONFIG_SERIAL_8250_NR_UARTS=4 |
| 154 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 |
| 155 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
| 156 | # CONFIG_SWAP is not set |
| 157 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 158 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 159 | CONFIG_UID16=y |
| 160 | CONFIG_USB_SUPPORT=y |
| 161 | CONFIG_VECTORS_BASE=0xffff0000 |
| 162 | CONFIG_VM_EVENT_COUNTERS=y |
| 163 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 164 | CONFIG_XSCALE_PMU=y |
| 165 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 166 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
target/linux/ixp4xx/patches-2.6.33/020-gateworks_i2c_pld.patch |
| 1 | --- /dev/null |
| 2 | @@ -0,0 +1,371 @@ |
| 3 | +/* |
| 4 | + * Gateworks I2C PLD GPIO expander |
| 5 | + * |
| 6 | + * Copyright (C) 2009 Gateworks Corporation |
| 7 | + * |
| 8 | + * This program is free software; you can redistribute it and/or modify |
| 9 | + * it under the terms of the GNU General Public License as published by |
| 10 | + * the Free Software Foundation; either version 2 of the License, or |
| 11 | + * (at your option) any later version. |
| 12 | + * |
| 13 | + * This program is distributed in the hope that it will be useful, |
| 14 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | + * GNU General Public License for more details. |
| 17 | + * |
| 18 | + * You should have received a copy of the GNU General Public License |
| 19 | + * along with this program; if not, write to the Free Software |
| 20 | + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | + */ |
| 22 | + |
| 23 | +#include <linux/kernel.h> |
| 24 | +#include <linux/slab.h> |
| 25 | +#include <linux/hardirq.h> |
| 26 | +#include <linux/i2c.h> |
| 27 | +#include <linux/i2c/gw_i2c_pld.h> |
| 28 | +#include <asm/gpio.h> |
| 29 | + |
| 30 | +static const struct i2c_device_id gw_i2c_pld_id[] = { |
| 31 | + { "gw_i2c_pld", 8 }, |
| 32 | + { } |
| 33 | +}; |
| 34 | +MODULE_DEVICE_TABLE(i2c, gw_i2c_pld_id); |
| 35 | + |
| 36 | +/* |
| 37 | + * The Gateworks I2C PLD chip only expose one read and one |
| 38 | + * write register. Writing a "one" bit (to match the reset state) lets |
| 39 | + * that pin be used as an input. It is an open-drain model. |
| 40 | + */ |
| 41 | + |
| 42 | +struct gw_i2c_pld { |
| 43 | + struct gpio_chip chip; |
| 44 | + struct i2c_client *client; |
| 45 | + unsigned out; /* software latch */ |
| 46 | +}; |
| 47 | + |
| 48 | +/*-------------------------------------------------------------------------*/ |
| 49 | + |
| 50 | +/* |
| 51 | + * The Gateworks I2C PLD chip does not properly send the acknowledge bit |
| 52 | + * thus we cannot use standard i2c_smbus functions. We have recreated |
| 53 | + * our own here, but we still use the mutex_lock to lock the i2c_bus |
| 54 | + * as the device still exists on the I2C bus. |
| 55 | +*/ |
| 56 | + |
| 57 | +#define PLD_SCL_GPIO 6 |
| 58 | +#define PLD_SDA_GPIO 7 |
| 59 | + |
| 60 | +#define SCL_LO() gpio_line_set(PLD_SCL_GPIO, IXP4XX_GPIO_LOW) |
| 61 | +#define SCL_HI() gpio_line_set(PLD_SCL_GPIO, IXP4XX_GPIO_HIGH) |
| 62 | +#define SCL_EN() gpio_line_config(PLD_SCL_GPIO, IXP4XX_GPIO_OUT) |
| 63 | +#define SDA_LO() gpio_line_set(PLD_SDA_GPIO, IXP4XX_GPIO_LOW) |
| 64 | +#define SDA_HI() gpio_line_set(PLD_SDA_GPIO, IXP4XX_GPIO_HIGH) |
| 65 | +#define SDA_EN() gpio_line_config(PLD_SDA_GPIO, IXP4XX_GPIO_OUT) |
| 66 | +#define SDA_DIS() gpio_line_config(PLD_SDA_GPIO, IXP4XX_GPIO_IN) |
| 67 | +#define SDA_IN(x) gpio_line_get(PLD_SDA_GPIO, &x); |
| 68 | + |
| 69 | +static int i2c_pld_write_byte(int address, int byte) |
| 70 | +{ |
| 71 | + int i; |
| 72 | + |
| 73 | + address = (address << 1) & ~0x1; |
| 74 | + |
| 75 | + SDA_HI(); |
| 76 | + SDA_EN(); |
| 77 | + SCL_EN(); |
| 78 | + SCL_HI(); |
| 79 | + SDA_LO(); |
| 80 | + SCL_LO(); |
| 81 | + |
| 82 | + for (i = 7; i >= 0; i--) |
| 83 | + { |
| 84 | + if (address & (1 << i)) |
| 85 | + SDA_HI(); |
| 86 | + else |
| 87 | + SDA_LO(); |
| 88 | + |
| 89 | + SCL_HI(); |
| 90 | + SCL_LO(); |
| 91 | + } |
| 92 | + |
| 93 | + SDA_DIS(); |
| 94 | + SCL_HI(); |
| 95 | + SDA_IN(i); |
| 96 | + SCL_LO(); |
| 97 | + SDA_EN(); |
| 98 | + |
| 99 | + for (i = 7; i >= 0; i--) |
| 100 | + { |
| 101 | + if (byte & (1 << i)) |
| 102 | + SDA_HI(); |
| 103 | + else |
| 104 | + SDA_LO(); |
| 105 | + SCL_HI(); |
| 106 | + SCL_LO(); |
| 107 | + } |
| 108 | + |
| 109 | + SDA_DIS(); |
| 110 | + SCL_HI(); |
| 111 | + SDA_IN(i); |
| 112 | + SCL_LO(); |
| 113 | + |
| 114 | + SDA_HI(); |
| 115 | + SDA_EN(); |
| 116 | + |
| 117 | + SDA_LO(); |
| 118 | + SCL_HI(); |
| 119 | + SDA_HI(); |
| 120 | + SCL_LO(); |
| 121 | + SCL_HI(); |
| 122 | + |
| 123 | + return 0; |
| 124 | +} |
| 125 | + |
| 126 | +static unsigned int i2c_pld_read_byte(int address) |
| 127 | +{ |
| 128 | + int i = 0, byte = 0; |
| 129 | + int bit; |
| 130 | + |
| 131 | + address = (address << 1) | 0x1; |
| 132 | + |
| 133 | + SDA_HI(); |
| 134 | + SDA_EN(); |
| 135 | + SCL_EN(); |
| 136 | + SCL_HI(); |
| 137 | + SDA_LO(); |
| 138 | + SCL_LO(); |
| 139 | + |
| 140 | + for (i = 7; i >= 0; i--) |
| 141 | + { |
| 142 | + if (address & (1 << i)) |
| 143 | + SDA_HI(); |
| 144 | + else |
| 145 | + SDA_LO(); |
| 146 | + |
| 147 | + SCL_HI(); |
| 148 | + SCL_LO(); |
| 149 | + } |
| 150 | + |
| 151 | + SDA_DIS(); |
| 152 | + SCL_HI(); |
| 153 | + SDA_IN(i); |
| 154 | + SCL_LO(); |
| 155 | + SDA_EN(); |
| 156 | + |
| 157 | + SDA_DIS(); |
| 158 | + for (i = 7; i >= 0; i--) |
| 159 | + { |
| 160 | + SCL_HI(); |
| 161 | + SDA_IN(bit); |
| 162 | + byte |= bit << i; |
| 163 | + SCL_LO(); |
| 164 | + } |
| 165 | + |
| 166 | + SDA_LO(); |
| 167 | + SCL_HI(); |
| 168 | + SDA_HI(); |
| 169 | + SCL_LO(); |
| 170 | + SCL_HI(); |
| 171 | + |
| 172 | + return byte; |
| 173 | +} |
| 174 | + |
| 175 | + |
| 176 | +static int gw_i2c_pld_input8(struct gpio_chip *chip, unsigned offset) |
| 177 | +{ |
| 178 | + int ret; |
| 179 | + struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip); |
| 180 | + struct i2c_adapter *adap = gpio->client->adapter; |
| 181 | + |
| 182 | + if (in_atomic() || irqs_disabled()) { |
| 183 | + ret = mutex_trylock(&adap->bus_lock); |
| 184 | + if (!ret) |
| 185 | + /* I2C activity is ongoing. */ |
| 186 | + return -EAGAIN; |
| 187 | + } else { |
| 188 | + mutex_lock_nested(&adap->bus_lock, adap->level); |
| 189 | + } |
| 190 | + |
| 191 | + gpio->out |= (1 << offset); |
| 192 | + |
| 193 | + ret = i2c_pld_write_byte(gpio->client->addr, gpio->out); |
| 194 | + |
| 195 | + mutex_unlock(&adap->bus_lock); |
| 196 | + |
| 197 | + return ret; |
| 198 | +} |
| 199 | + |
| 200 | +static int gw_i2c_pld_get8(struct gpio_chip *chip, unsigned offset) |
| 201 | +{ |
| 202 | + int ret; |
| 203 | + s32 value; |
| 204 | + struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip); |
| 205 | + struct i2c_adapter *adap = gpio->client->adapter; |
| 206 | + |
| 207 | + if (in_atomic() || irqs_disabled()) { |
| 208 | + ret = mutex_trylock(&adap->bus_lock); |
| 209 | + if (!ret) |
| 210 | + /* I2C activity is ongoing. */ |
| 211 | + return -EAGAIN; |
| 212 | + } else { |
| 213 | + mutex_lock_nested(&adap->bus_lock, adap->level); |
| 214 | + } |
| 215 | + |
| 216 | + value = i2c_pld_read_byte(gpio->client->addr); |
| 217 | + |
| 218 | + mutex_unlock(&adap->bus_lock); |
| 219 | + |
| 220 | + return (value < 0) ? 0 : (value & (1 << offset)); |
| 221 | +} |
| 222 | + |
| 223 | +static int gw_i2c_pld_output8(struct gpio_chip *chip, unsigned offset, int value) |
| 224 | +{ |
| 225 | + int ret; |
| 226 | + |
| 227 | + struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip); |
| 228 | + struct i2c_adapter *adap = gpio->client->adapter; |
| 229 | + |
| 230 | + unsigned bit = 1 << offset; |
| 231 | + |
| 232 | + if (in_atomic() || irqs_disabled()) { |
| 233 | + ret = mutex_trylock(&adap->bus_lock); |
| 234 | + if (!ret) |
| 235 | + /* I2C activity is ongoing. */ |
| 236 | + return -EAGAIN; |
| 237 | + } else { |
| 238 | + mutex_lock_nested(&adap->bus_lock, adap->level); |
| 239 | + } |
| 240 | + |
| 241 | + |
| 242 | + if (value) |
| 243 | + gpio->out |= bit; |
| 244 | + else |
| 245 | + gpio->out &= ~bit; |
| 246 | + |
| 247 | + ret = i2c_pld_write_byte(gpio->client->addr, gpio->out); |
| 248 | + |
| 249 | + mutex_unlock(&adap->bus_lock); |
| 250 | + |
| 251 | + return ret; |
| 252 | +} |
| 253 | + |
| 254 | +static void gw_i2c_pld_set8(struct gpio_chip *chip, unsigned offset, int value) |
| 255 | +{ |
| 256 | + gw_i2c_pld_output8(chip, offset, value); |
| 257 | +} |
| 258 | + |
| 259 | +/*-------------------------------------------------------------------------*/ |
| 260 | + |
| 261 | +static int gw_i2c_pld_probe(struct i2c_client *client, |
| 262 | + const struct i2c_device_id *id) |
| 263 | +{ |
| 264 | + struct gw_i2c_pld_platform_data *pdata; |
| 265 | + struct gw_i2c_pld *gpio; |
| 266 | + int status; |
| 267 | + |
| 268 | + pdata = client->dev.platform_data; |
| 269 | + if (!pdata) |
| 270 | + return -ENODEV; |
| 271 | + |
| 272 | + /* Allocate, initialize, and register this gpio_chip. */ |
| 273 | + gpio = kzalloc(sizeof *gpio, GFP_KERNEL); |
| 274 | + if (!gpio) |
| 275 | + return -ENOMEM; |
| 276 | + |
| 277 | + gpio->chip.base = pdata->gpio_base; |
| 278 | + gpio->chip.can_sleep = 1; |
| 279 | + gpio->chip.dev = &client->dev; |
| 280 | + gpio->chip.owner = THIS_MODULE; |
| 281 | + |
| 282 | + gpio->chip.ngpio = pdata->nr_gpio; |
| 283 | + gpio->chip.direction_input = gw_i2c_pld_input8; |
| 284 | + gpio->chip.get = gw_i2c_pld_get8; |
| 285 | + gpio->chip.direction_output = gw_i2c_pld_output8; |
| 286 | + gpio->chip.set = gw_i2c_pld_set8; |
| 287 | + |
| 288 | + gpio->chip.label = client->name; |
| 289 | + |
| 290 | + gpio->client = client; |
| 291 | + i2c_set_clientdata(client, gpio); |
| 292 | + |
| 293 | + gpio->out = 0xFF; |
| 294 | + |
| 295 | + status = gpiochip_add(&gpio->chip); |
| 296 | + if (status < 0) |
| 297 | + goto fail; |
| 298 | + |
| 299 | + dev_info(&client->dev, "gpios %d..%d on a %s%s\n", |
| 300 | + gpio->chip.base, |
| 301 | + gpio->chip.base + gpio->chip.ngpio - 1, |
| 302 | + client->name, |
| 303 | + client->irq ? " (irq ignored)" : ""); |
| 304 | + |
| 305 | + /* Let platform code set up the GPIOs and their users. |
| 306 | + * Now is the first time anyone could use them. |
| 307 | + */ |
| 308 | + if (pdata->setup) { |
| 309 | + status = pdata->setup(client, |
| 310 | + gpio->chip.base, gpio->chip.ngpio, |
| 311 | + pdata->context); |
| 312 | + if (status < 0) |
| 313 | + dev_warn(&client->dev, "setup --> %d\n", status); |
| 314 | + } |
| 315 | + |
| 316 | + return 0; |
| 317 | + |
| 318 | +fail: |
| 319 | + dev_dbg(&client->dev, "probe error %d for '%s'\n", |
| 320 | + status, client->name); |
| 321 | + kfree(gpio); |
| 322 | + return status; |
| 323 | +} |
| 324 | + |
| 325 | +static int gw_i2c_pld_remove(struct i2c_client *client) |
| 326 | +{ |
| 327 | + struct gw_i2c_pld_platform_data *pdata = client->dev.platform_data; |
| 328 | + struct gw_i2c_pld *gpio = i2c_get_clientdata(client); |
| 329 | + int status = 0; |
| 330 | + |
| 331 | + if (pdata->teardown) { |
| 332 | + status = pdata->teardown(client, |
| 333 | + gpio->chip.base, gpio->chip.ngpio, |
| 334 | + pdata->context); |
| 335 | + if (status < 0) { |
| 336 | + dev_err(&client->dev, "%s --> %d\n", |
| 337 | + "teardown", status); |
| 338 | + return status; |
| 339 | + } |
| 340 | + } |
| 341 | + |
| 342 | + status = gpiochip_remove(&gpio->chip); |
| 343 | + if (status == 0) |
| 344 | + kfree(gpio); |
| 345 | + else |
| 346 | + dev_err(&client->dev, "%s --> %d\n", "remove", status); |
| 347 | + return status; |
| 348 | +} |
| 349 | + |
| 350 | +static struct i2c_driver gw_i2c_pld_driver = { |
| 351 | + .driver = { |
| 352 | + .name = "gw_i2c_pld", |
| 353 | + .owner = THIS_MODULE, |
| 354 | + }, |
| 355 | + .probe = gw_i2c_pld_probe, |
| 356 | + .remove = gw_i2c_pld_remove, |
| 357 | + .id_table = gw_i2c_pld_id, |
| 358 | +}; |
| 359 | + |
| 360 | +static int __init gw_i2c_pld_init(void) |
| 361 | +{ |
| 362 | + return i2c_add_driver(&gw_i2c_pld_driver); |
| 363 | +} |
| 364 | +module_init(gw_i2c_pld_init); |
| 365 | + |
| 366 | +static void __exit gw_i2c_pld_exit(void) |
| 367 | +{ |
| 368 | + i2c_del_driver(&gw_i2c_pld_driver); |
| 369 | +} |
| 370 | +module_exit(gw_i2c_pld_exit); |
| 371 | + |
| 372 | +MODULE_LICENSE("GPL"); |
| 373 | +MODULE_AUTHOR("Chris Lang"); |
| 374 | --- a/drivers/gpio/Kconfig |
| 375 | @@ -221,6 +221,14 @@ config GPIO_TIMBERDALE |
| 376 | ---help--- |
| 377 | Add support for the GPIO IP in the timberdale FPGA. |
| 378 | |
| 379 | +config GPIO_GW_I2C_PLD |
| 380 | + tristate "Gateworks I2C PLD GPIO Expander" |
| 381 | + depends on I2C |
| 382 | + help |
| 383 | + Say yes here to provide access to the Gateworks I2C PLD GPIO |
| 384 | + Expander. This is used at least on the GW2358-4. |
| 385 | + |
| 386 | + |
| 387 | comment "SPI GPIO expanders:" |
| 388 | |
| 389 | config GPIO_MAX7301 |
| 390 | --- a/drivers/gpio/Makefile |
| 391 | @@ -22,3 +22,4 @@ obj-$(CONFIG_GPIO_CS5535) += cs5535-gpio |
| 392 | obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o |
| 393 | obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o |
| 394 | obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o |
| 395 | +obj-$(CONFIG_GPIO_GW_I2C_PLD) += gw_i2c_pld.o |
| 396 | --- /dev/null |
| 397 | @@ -0,0 +1,20 @@ |
| 398 | +#ifndef __LINUX_GW_I2C_PLD_H |
| 399 | +#define __LINUX_GW_I2C_PLD_H |
| 400 | + |
| 401 | +/** |
| 402 | + * The Gateworks I2C PLD Implements an additional 8 bits of GPIO through the PLD |
| 403 | + */ |
| 404 | + |
| 405 | +struct gw_i2c_pld_platform_data { |
| 406 | + unsigned gpio_base; |
| 407 | + unsigned nr_gpio; |
| 408 | + int (*setup)(struct i2c_client *client, |
| 409 | + int gpio, unsigned ngpio, |
| 410 | + void *context); |
| 411 | + int (*teardown)(struct i2c_client *client, |
| 412 | + int gpio, unsigned ngpio, |
| 413 | + void *context); |
| 414 | + void *context; |
| 415 | +}; |
| 416 | + |
| 417 | +#endif /* __LINUX_GW_I2C_PLD_H */ |
target/linux/ixp4xx/patches-2.6.33/050-disable_dmabounce.patch |
| 1 | --- a/arch/arm/Kconfig |
| 2 | @@ -417,7 +417,6 @@ config ARCH_IXP4XX |
| 3 | select GENERIC_GPIO |
| 4 | select GENERIC_TIME |
| 5 | select GENERIC_CLOCKEVENTS |
| 6 | - select DMABOUNCE if PCI |
| 7 | help |
| 8 | Support for Intel's IXP4XX (XScale) family of processors. |
| 9 | |
| 10 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 11 | @@ -199,6 +199,45 @@ config IXP4XX_INDIRECT_PCI |
| 12 | need to use the indirect method instead. If you don't know |
| 13 | what you need, leave this option unselected. |
| 14 | |
| 15 | +config IXP4XX_LEGACY_DMABOUNCE |
| 16 | + bool "legacy PCI DMA bounce support" |
| 17 | + depends on PCI |
| 18 | + default n |
| 19 | + select DMABOUNCE |
| 20 | + help |
| 21 | + The IXP4xx is limited to a 64MB window for PCI DMA, which |
| 22 | + requires that PCI accesses above 64MB are bounced via buffers |
| 23 | + below 64MB. Furthermore the IXP4xx has an erratum where PCI |
| 24 | + read prefetches just below the 64MB limit can trigger lockups. |
| 25 | + |
| 26 | + The kernel has traditionally handled these two issue by using |
| 27 | + ARM specific DMA bounce support code for all accesses >= 64MB. |
| 28 | + That code causes problems of its own, so it is desirable to |
| 29 | + disable it. As the kernel now has a workaround for the PCI read |
| 30 | + prefetch erratum, it no longer requires the ARM bounce code. |
| 31 | + |
| 32 | + Enabling this option makes IXP4xx continue to use the problematic |
| 33 | + ARM DMA bounce code. Disabling this option makes IXP4xx use the |
| 34 | + kernel's generic bounce code. |
| 35 | + |
| 36 | + Say 'N'. |
| 37 | + |
| 38 | +config IXP4XX_ZONE_DMA |
| 39 | + bool "Support > 64MB RAM" |
| 40 | + depends on !IXP4XX_LEGACY_DMABOUNCE |
| 41 | + default y |
| 42 | + select ZONE_DMA |
| 43 | + help |
| 44 | + The IXP4xx is limited to a 64MB window for PCI DMA, which |
| 45 | + requires that PCI accesses above 64MB are bounced via buffers |
| 46 | + below 64MB. |
| 47 | + |
| 48 | + Disabling this option allows you to omit the support code for |
| 49 | + DMA-able memory allocations and DMA bouncing, but the kernel |
| 50 | + will then not work properly if more than 64MB of RAM is present. |
| 51 | + |
| 52 | + Say 'Y' unless your platform is limited to <= 64MB of RAM. |
| 53 | + |
| 54 | config IXP4XX_QMGR |
| 55 | tristate "IXP4xx Queue Manager support" |
| 56 | help |
| 57 | --- a/arch/arm/mach-ixp4xx/common-pci.c |
| 58 | @@ -321,27 +321,38 @@ static int abort_handler(unsigned long a |
| 59 | */ |
| 60 | static int ixp4xx_pci_platform_notify(struct device *dev) |
| 61 | { |
| 62 | - if(dev->bus == &pci_bus_type) { |
| 63 | - *dev->dma_mask = SZ_64M - 1; |
| 64 | + if (dev->bus == &pci_bus_type) { |
| 65 | + *dev->dma_mask = SZ_64M - 1; |
| 66 | dev->coherent_dma_mask = SZ_64M - 1; |
| 67 | +#ifdef CONFIG_DMABOUNCE |
| 68 | dmabounce_register_dev(dev, 2048, 4096); |
| 69 | +#endif |
| 70 | } |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | static int ixp4xx_pci_platform_notify_remove(struct device *dev) |
| 75 | { |
| 76 | - if(dev->bus == &pci_bus_type) { |
| 77 | +#ifdef CONFIG_DMABOUNCE |
| 78 | + if (dev->bus == &pci_bus_type) |
| 79 | dmabounce_unregister_dev(dev); |
| 80 | - } |
| 81 | +#endif |
| 82 | return 0; |
| 83 | } |
| 84 | |
| 85 | +#ifdef CONFIG_DMABOUNCE |
| 86 | int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) |
| 87 | { |
| 88 | + /* Note that this returns true for the last page below 64M due to |
| 89 | + * IXP4xx erratum 15 (SCR 1289), which states that PCI prefetches |
| 90 | + * can cross the boundary between valid memory and a reserved region |
| 91 | + * causing AHB bus errors and a lock-up. |
| 92 | + */ |
| 93 | return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M); |
| 94 | } |
| 95 | +#endif |
| 96 | |
| 97 | +#ifdef CONFIG_ZONE_DMA |
| 98 | /* |
| 99 | * Only first 64MB of memory can be accessed via PCI. |
| 100 | * We use GFP_DMA to allocate safe buffers to do map/unmap. |
| 101 | @@ -364,6 +375,7 @@ void __init ixp4xx_adjust_zones(int node |
| 102 | zhole_size[1] = zhole_size[0]; |
| 103 | zhole_size[0] = 0; |
| 104 | } |
| 105 | +#endif |
| 106 | |
| 107 | void __init ixp4xx_pci_preinit(void) |
| 108 | { |
| 109 | @@ -513,19 +525,35 @@ struct pci_bus * __devinit ixp4xx_scan_b |
| 110 | int |
| 111 | pci_set_dma_mask(struct pci_dev *dev, u64 mask) |
| 112 | { |
| 113 | - if (mask >= SZ_64M - 1 ) |
| 114 | +#ifdef CONFIG_DMABOUNCE |
| 115 | + if (mask >= SZ_64M - 1) |
| 116 | return 0; |
| 117 | |
| 118 | return -EIO; |
| 119 | +#else |
| 120 | + /* Only honour masks < SZ_64M. Silently ignore masks >= SZ_64M |
| 121 | + as generic drivers do not know about IXP4xx PCI DMA quirks. */ |
| 122 | + if (mask < SZ_64M) |
| 123 | + dev->dma_mask = mask; |
| 124 | + return 0; |
| 125 | +#endif |
| 126 | } |
| 127 | |
| 128 | int |
| 129 | pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) |
| 130 | { |
| 131 | - if (mask >= SZ_64M - 1 ) |
| 132 | +#ifdef CONFIG_DMABOUNCE |
| 133 | + if (mask >= SZ_64M - 1) |
| 134 | return 0; |
| 135 | |
| 136 | return -EIO; |
| 137 | +#else |
| 138 | + /* Only honour masks < SZ_64M. Silently ignore masks >= SZ_64M |
| 139 | + as generic drivers do not know about IXP4xx PCI DMA quirks. */ |
| 140 | + if (mask < SZ_64M) |
| 141 | + dev->dev.coherent_dma_mask = mask; |
| 142 | + return 0; |
| 143 | +#endif |
| 144 | } |
| 145 | |
| 146 | EXPORT_SYMBOL(ixp4xx_pci_read); |
| 147 | --- a/arch/arm/mach-ixp4xx/include/mach/memory.h |
| 148 | @@ -16,10 +16,12 @@ |
| 149 | |
| 150 | #if !defined(__ASSEMBLY__) && defined(CONFIG_PCI) |
| 151 | |
| 152 | +#ifdef CONFIG_ZONE_DMA |
| 153 | void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes); |
| 154 | |
| 155 | #define arch_adjust_zones(node, size, holes) \ |
| 156 | ixp4xx_adjust_zones(node, size, holes) |
| 157 | +#endif |
| 158 | |
| 159 | #define ISA_DMA_THRESHOLD (SZ_64M - 1) |
| 160 | #define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) |
target/linux/ixp4xx/patches-2.6.33/105-wg302v1_support.patch |
| 1 | --- a/arch/arm/configs/ixp4xx_defconfig |
| 2 | @@ -155,6 +155,7 @@ CONFIG_MACH_AVILA=y |
| 3 | CONFIG_MACH_LOFT=y |
| 4 | CONFIG_ARCH_ADI_COYOTE=y |
| 5 | CONFIG_MACH_GATEWAY7001=y |
| 6 | +CONFIG_MACH_WG302V1=y |
| 7 | CONFIG_MACH_WG302V2=y |
| 8 | CONFIG_ARCH_IXDP425=y |
| 9 | CONFIG_MACH_IXDPG425=y |
| 10 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 11 | @@ -49,6 +49,14 @@ config MACH_GATEWAY7001 |
| 12 | 7001 Access Point. For more information on this platform, |
| 13 | see http://openwrt.org |
| 14 | |
| 15 | +config MACH_WG302V1 |
| 16 | + bool "Netgear WG302 v1 / WAG302 v1" |
| 17 | + select PCI |
| 18 | + help |
| 19 | + Say 'Y' here if you want your kernel to support Netgear's |
| 20 | + WG302 v1 or WAG302 v1 Access Points. For more information |
| 21 | + on this platform, see http://openwrt.org |
| 22 | + |
| 23 | config MACH_WG302V2 |
| 24 | bool "Netgear WG302 v2 / WAG302 v2" |
| 25 | select PCI |
| 26 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 27 | @@ -14,6 +14,7 @@ obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-p |
| 28 | obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o |
| 29 | obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o |
| 30 | obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o |
| 31 | +obj-pci-$(CONFIG_MACH_WG302V1) += wg302v1-pci.o |
| 32 | obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o |
| 33 | obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o |
| 34 | |
| 35 | @@ -28,6 +29,7 @@ obj-$(CONFIG_MACH_NSLU2) += nslu2-setup. |
| 36 | obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o |
| 37 | obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o |
| 38 | obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o |
| 39 | +obj-$(CONFIG_MACH_WG302V1) += wg302v1-setup.o |
| 40 | obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o |
| 41 | obj-$(CONFIG_MACH_FSG) += fsg-setup.o |
| 42 | obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o |
| 43 | --- /dev/null |
| 44 | @@ -0,0 +1,64 @@ |
| 45 | +/* |
| 46 | + * arch/arch/mach-ixp4xx/wg302v1-pci.c |
| 47 | + * |
| 48 | + * PCI setup routines for the Netgear WG302 v1 and WAG302 v1 |
| 49 | + * |
| 50 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 51 | + * |
| 52 | + * based on coyote-pci.c: |
| 53 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 54 | + * Copyright (C) 2003 MontaVista Software, Inc. |
| 55 | + * |
| 56 | + * Maintainer: Imre Kaloz <kaloz@openwrt.org> |
| 57 | + * |
| 58 | + * This program is free software; you can redistribute it and/or modify |
| 59 | + * it under the terms of the GNU General Public License version 2 as |
| 60 | + * published by the Free Software Foundation. |
| 61 | + * |
| 62 | + */ |
| 63 | + |
| 64 | +#include <linux/kernel.h> |
| 65 | +#include <linux/pci.h> |
| 66 | +#include <linux/init.h> |
| 67 | +#include <linux/irq.h> |
| 68 | + |
| 69 | +#include <asm/mach-types.h> |
| 70 | +#include <mach/hardware.h> |
| 71 | + |
| 72 | +#include <asm/mach/pci.h> |
| 73 | + |
| 74 | +void __init wg302v1_pci_preinit(void) |
| 75 | +{ |
| 76 | + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); |
| 77 | + set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); |
| 78 | + |
| 79 | + ixp4xx_pci_preinit(); |
| 80 | +} |
| 81 | + |
| 82 | +static int __init wg302v1_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 83 | +{ |
| 84 | + if (slot == 1) |
| 85 | + return IRQ_IXP4XX_GPIO8; |
| 86 | + else if (slot == 2) |
| 87 | + return IRQ_IXP4XX_GPIO10; |
| 88 | + else |
| 89 | + return -1; |
| 90 | +} |
| 91 | + |
| 92 | +struct hw_pci wg302v1_pci __initdata = { |
| 93 | + .nr_controllers = 1, |
| 94 | + .preinit = wg302v1_pci_preinit, |
| 95 | + .swizzle = pci_std_swizzle, |
| 96 | + .setup = ixp4xx_setup, |
| 97 | + .scan = ixp4xx_scan_bus, |
| 98 | + .map_irq = wg302v1_map_irq, |
| 99 | +}; |
| 100 | + |
| 101 | +int __init wg302v1_pci_init(void) |
| 102 | +{ |
| 103 | + if (machine_is_wg302v1()) |
| 104 | + pci_common_init(&wg302v1_pci); |
| 105 | + return 0; |
| 106 | +} |
| 107 | + |
| 108 | +subsys_initcall(wg302v1_pci_init); |
| 109 | --- /dev/null |
| 110 | @@ -0,0 +1,142 @@ |
| 111 | +/* |
| 112 | + * arch/arm/mach-ixp4xx/wg302v1-setup.c |
| 113 | + * |
| 114 | + * Board setup for the Netgear WG302 v1 and WAG302 v1 |
| 115 | + * |
| 116 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 117 | + * |
| 118 | + * based on coyote-setup.c: |
| 119 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 120 | + * |
| 121 | + * Author: Imre Kaloz <kaloz@openwrt.org> |
| 122 | + * |
| 123 | + */ |
| 124 | + |
| 125 | +#include <linux/kernel.h> |
| 126 | +#include <linux/init.h> |
| 127 | +#include <linux/device.h> |
| 128 | +#include <linux/serial.h> |
| 129 | +#include <linux/tty.h> |
| 130 | +#include <linux/serial_8250.h> |
| 131 | +#include <linux/slab.h> |
| 132 | +#include <linux/types.h> |
| 133 | +#include <linux/memory.h> |
| 134 | + |
| 135 | +#include <asm/setup.h> |
| 136 | +#include <mach/hardware.h> |
| 137 | +#include <asm/irq.h> |
| 138 | +#include <asm/mach-types.h> |
| 139 | +#include <asm/mach/arch.h> |
| 140 | +#include <asm/mach/flash.h> |
| 141 | + |
| 142 | +static struct flash_platform_data wg302v1_flash_data = { |
| 143 | + .map_name = "cfi_probe", |
| 144 | + .width = 2, |
| 145 | +}; |
| 146 | + |
| 147 | +static struct resource wg302v1_flash_resource = { |
| 148 | + .flags = IORESOURCE_MEM, |
| 149 | +}; |
| 150 | + |
| 151 | +static struct platform_device wg302v1_flash = { |
| 152 | + .name = "IXP4XX-Flash", |
| 153 | + .id = 0, |
| 154 | + .dev = { |
| 155 | + .platform_data = &wg302v1_flash_data, |
| 156 | + }, |
| 157 | + .num_resources = 1, |
| 158 | + .resource = &wg302v1_flash_resource, |
| 159 | +}; |
| 160 | + |
| 161 | +static struct resource wg302v1_uart_resources[] = { |
| 162 | + { |
| 163 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 164 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 165 | + .flags = IORESOURCE_MEM, |
| 166 | + }, |
| 167 | + { |
| 168 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 169 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 170 | + .flags = IORESOURCE_MEM, |
| 171 | + } |
| 172 | +}; |
| 173 | + |
| 174 | +static struct plat_serial8250_port wg302v1_uart_data[] = { |
| 175 | + { |
| 176 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 177 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 178 | + .irq = IRQ_IXP4XX_UART1, |
| 179 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 180 | + .iotype = UPIO_MEM, |
| 181 | + .regshift = 2, |
| 182 | + .uartclk = IXP4XX_UART_XTAL, |
| 183 | + }, |
| 184 | + { |
| 185 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 186 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 187 | + .irq = IRQ_IXP4XX_UART2, |
| 188 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 189 | + .iotype = UPIO_MEM, |
| 190 | + .regshift = 2, |
| 191 | + .uartclk = IXP4XX_UART_XTAL, |
| 192 | + }, |
| 193 | + { }, |
| 194 | +}; |
| 195 | + |
| 196 | +static struct platform_device wg302v1_uart = { |
| 197 | + .name = "serial8250", |
| 198 | + .id = PLAT8250_DEV_PLATFORM, |
| 199 | + .dev = { |
| 200 | + .platform_data = wg302v1_uart_data, |
| 201 | + }, |
| 202 | + .num_resources = 2, |
| 203 | + .resource = wg302v1_uart_resources, |
| 204 | +}; |
| 205 | + |
| 206 | +static struct eth_plat_info wg302v1_plat_eth[] = { |
| 207 | + { |
| 208 | + .phy = 30, |
| 209 | + .rxq = 3, |
| 210 | + .txreadyq = 20, |
| 211 | + } |
| 212 | +}; |
| 213 | + |
| 214 | +static struct platform_device wg302v1_eth[] = { |
| 215 | + { |
| 216 | + .name = "ixp4xx_eth", |
| 217 | + .id = IXP4XX_ETH_NPEB, |
| 218 | + .dev.platform_data = wg302v1_plat_eth, |
| 219 | + } |
| 220 | +}; |
| 221 | + |
| 222 | +static struct platform_device *wg302v1_devices[] __initdata = { |
| 223 | + &wg302v1_flash, |
| 224 | + &wg302v1_uart, |
| 225 | + &wg302v1_eth[0], |
| 226 | +}; |
| 227 | + |
| 228 | +static void __init wg302v1_init(void) |
| 229 | +{ |
| 230 | + ixp4xx_sys_init(); |
| 231 | + |
| 232 | + wg302v1_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 233 | + wg302v1_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 234 | + |
| 235 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 236 | + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 237 | + |
| 238 | + platform_add_devices(wg302v1_devices, ARRAY_SIZE(wg302v1_devices)); |
| 239 | +} |
| 240 | + |
| 241 | +#ifdef CONFIG_MACH_WG302V1 |
| 242 | +MACHINE_START(WG302V1, "Netgear WG302 v1 / WAG302 v1") |
| 243 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 244 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 245 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 246 | + .map_io = ixp4xx_map_io, |
| 247 | + .init_irq = ixp4xx_init_irq, |
| 248 | + .timer = &ixp4xx_timer, |
| 249 | + .boot_params = 0x0100, |
| 250 | + .init_machine = wg302v1_init, |
| 251 | +MACHINE_END |
| 252 | +#endif |
target/linux/ixp4xx/patches-2.6.33/110-pronghorn_series_support.patch |
| 1 | --- a/arch/arm/configs/ixp4xx_defconfig |
| 2 | @@ -157,6 +157,8 @@ CONFIG_ARCH_ADI_COYOTE=y |
| 3 | CONFIG_MACH_GATEWAY7001=y |
| 4 | CONFIG_MACH_WG302V1=y |
| 5 | CONFIG_MACH_WG302V2=y |
| 6 | +CONFIG_MACH_PRONGHORN=y |
| 7 | +CONFIG_MACH_PRONGHORNMETRO=y |
| 8 | CONFIG_ARCH_IXDP425=y |
| 9 | CONFIG_MACH_IXDPG425=y |
| 10 | CONFIG_MACH_IXDP465=y |
| 11 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 12 | @@ -65,6 +65,22 @@ config MACH_WG302V2 |
| 13 | WG302 v2 or WAG302 v2 Access Points. For more information |
| 14 | on this platform, see http://openwrt.org |
| 15 | |
| 16 | +config MACH_PRONGHORN |
| 17 | + bool "ADI Pronghorn series" |
| 18 | + select PCI |
| 19 | + help |
| 20 | + Say 'Y' here if you want your kernel to support the ADI |
| 21 | + Engineering Pronghorn series. For more |
| 22 | + information on this platform, see http://www.adiengineering.com |
| 23 | + |
| 24 | +# |
| 25 | +# There're only minimal differences kernel-wise between the Pronghorn and |
| 26 | +# Pronghorn Metro boards - they use different chip selects to drive the |
| 27 | +# CF slot connected to the expansion bus, so we just enable them together. |
| 28 | +# |
| 29 | +config MACH_PRONGHORNMETRO |
| 30 | + def_bool MACH_PRONGHORN |
| 31 | + |
| 32 | config ARCH_IXDP425 |
| 33 | bool "IXDP425" |
| 34 | help |
| 35 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 36 | @@ -17,6 +17,7 @@ obj-pci-$(CONFIG_MACH_GATEWAY7001) += ga |
| 37 | obj-pci-$(CONFIG_MACH_WG302V1) += wg302v1-pci.o |
| 38 | obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o |
| 39 | obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o |
| 40 | +obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o |
| 41 | |
| 42 | obj-y += common.o |
| 43 | |
| 44 | @@ -33,6 +34,7 @@ obj-$(CONFIG_MACH_WG302V1) += wg302v1-se |
| 45 | obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o |
| 46 | obj-$(CONFIG_MACH_FSG) += fsg-setup.o |
| 47 | obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o |
| 48 | +obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o |
| 49 | |
| 50 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 51 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 52 | --- /dev/null |
| 53 | @@ -0,0 +1,70 @@ |
| 54 | +/* |
| 55 | + * arch/arch/mach-ixp4xx/pronghorn-pci.c |
| 56 | + * |
| 57 | + * PCI setup routines for ADI Engineering Pronghorn series |
| 58 | + * |
| 59 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 60 | + * |
| 61 | + * based on coyote-pci.c: |
| 62 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 63 | + * Copyright (C) 2003 MontaVista Softwrae, Inc. |
| 64 | + * |
| 65 | + * Maintainer: Imre Kaloz <kaloz@openwrt.org> |
| 66 | + * |
| 67 | + * This program is free software; you can redistribute it and/or modify |
| 68 | + * it under the terms of the GNU General Public License version 2 as |
| 69 | + * published by the Free Software Foundation. |
| 70 | + * |
| 71 | + */ |
| 72 | + |
| 73 | +#include <linux/kernel.h> |
| 74 | +#include <linux/pci.h> |
| 75 | +#include <linux/init.h> |
| 76 | +#include <linux/irq.h> |
| 77 | + |
| 78 | +#include <asm/mach-types.h> |
| 79 | +#include <mach/hardware.h> |
| 80 | + |
| 81 | +#include <asm/mach/pci.h> |
| 82 | + |
| 83 | +void __init pronghorn_pci_preinit(void) |
| 84 | +{ |
| 85 | + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_LEVEL_LOW); |
| 86 | + set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); |
| 87 | + set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); |
| 88 | + set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW); |
| 89 | + |
| 90 | + ixp4xx_pci_preinit(); |
| 91 | +} |
| 92 | + |
| 93 | +static int __init pronghorn_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 94 | +{ |
| 95 | + if (slot == 13) |
| 96 | + return IRQ_IXP4XX_GPIO4; |
| 97 | + else if (slot == 14) |
| 98 | + return IRQ_IXP4XX_GPIO6; |
| 99 | + else if (slot == 15) |
| 100 | + return IRQ_IXP4XX_GPIO11; |
| 101 | + else if (slot == 16) |
| 102 | + return IRQ_IXP4XX_GPIO1; |
| 103 | + else |
| 104 | + return -1; |
| 105 | +} |
| 106 | + |
| 107 | +struct hw_pci pronghorn_pci __initdata = { |
| 108 | + .nr_controllers = 1, |
| 109 | + .preinit = pronghorn_pci_preinit, |
| 110 | + .swizzle = pci_std_swizzle, |
| 111 | + .setup = ixp4xx_setup, |
| 112 | + .scan = ixp4xx_scan_bus, |
| 113 | + .map_irq = pronghorn_map_irq, |
| 114 | +}; |
| 115 | + |
| 116 | +int __init pronghorn_pci_init(void) |
| 117 | +{ |
| 118 | + if (machine_is_pronghorn() || machine_is_pronghorn_metro()) |
| 119 | + pci_common_init(&pronghorn_pci); |
| 120 | + return 0; |
| 121 | +} |
| 122 | + |
| 123 | +subsys_initcall(pronghorn_pci_init); |
| 124 | --- /dev/null |
| 125 | @@ -0,0 +1,245 @@ |
| 126 | +/* |
| 127 | + * arch/arm/mach-ixp4xx/pronghorn-setup.c |
| 128 | + * |
| 129 | + * Board setup for the ADI Engineering Pronghorn series |
| 130 | + * |
| 131 | + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org> |
| 132 | + * |
| 133 | + * based on coyote-setup.c: |
| 134 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 135 | + * |
| 136 | + * Author: Imre Kaloz <Kaloz@openwrt.org> |
| 137 | + */ |
| 138 | + |
| 139 | +#include <linux/kernel.h> |
| 140 | +#include <linux/init.h> |
| 141 | +#include <linux/device.h> |
| 142 | +#include <linux/serial.h> |
| 143 | +#include <linux/tty.h> |
| 144 | +#include <linux/serial_8250.h> |
| 145 | +#include <linux/slab.h> |
| 146 | +#include <linux/types.h> |
| 147 | +#include <linux/memory.h> |
| 148 | +#include <linux/i2c-gpio.h> |
| 149 | +#include <linux/leds.h> |
| 150 | + |
| 151 | +#include <asm/setup.h> |
| 152 | +#include <mach/hardware.h> |
| 153 | +#include <asm/irq.h> |
| 154 | +#include <asm/mach-types.h> |
| 155 | +#include <asm/mach/arch.h> |
| 156 | +#include <asm/mach/flash.h> |
| 157 | + |
| 158 | +static struct flash_platform_data pronghorn_flash_data = { |
| 159 | + .map_name = "cfi_probe", |
| 160 | + .width = 2, |
| 161 | +}; |
| 162 | + |
| 163 | +static struct resource pronghorn_flash_resource = { |
| 164 | + .flags = IORESOURCE_MEM, |
| 165 | +}; |
| 166 | + |
| 167 | +static struct platform_device pronghorn_flash = { |
| 168 | + .name = "IXP4XX-Flash", |
| 169 | + .id = 0, |
| 170 | + .dev = { |
| 171 | + .platform_data = &pronghorn_flash_data, |
| 172 | + }, |
| 173 | + .num_resources = 1, |
| 174 | + .resource = &pronghorn_flash_resource, |
| 175 | +}; |
| 176 | + |
| 177 | +static struct resource pronghorn_uart_resources [] = { |
| 178 | + { |
| 179 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 180 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 181 | + .flags = IORESOURCE_MEM |
| 182 | + }, |
| 183 | + { |
| 184 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 185 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 186 | + .flags = IORESOURCE_MEM |
| 187 | + } |
| 188 | +}; |
| 189 | + |
| 190 | +static struct plat_serial8250_port pronghorn_uart_data[] = { |
| 191 | + { |
| 192 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 193 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 194 | + .irq = IRQ_IXP4XX_UART1, |
| 195 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 196 | + .iotype = UPIO_MEM, |
| 197 | + .regshift = 2, |
| 198 | + .uartclk = IXP4XX_UART_XTAL, |
| 199 | + }, |
| 200 | + { |
| 201 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 202 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 203 | + .irq = IRQ_IXP4XX_UART2, |
| 204 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 205 | + .iotype = UPIO_MEM, |
| 206 | + .regshift = 2, |
| 207 | + .uartclk = IXP4XX_UART_XTAL, |
| 208 | + }, |
| 209 | + { }, |
| 210 | +}; |
| 211 | + |
| 212 | +static struct platform_device pronghorn_uart = { |
| 213 | + .name = "serial8250", |
| 214 | + .id = PLAT8250_DEV_PLATFORM, |
| 215 | + .dev = { |
| 216 | + .platform_data = pronghorn_uart_data, |
| 217 | + }, |
| 218 | + .num_resources = 2, |
| 219 | + .resource = pronghorn_uart_resources, |
| 220 | +}; |
| 221 | + |
| 222 | +static struct i2c_gpio_platform_data pronghorn_i2c_gpio_data = { |
| 223 | + .sda_pin = 9, |
| 224 | + .scl_pin = 10, |
| 225 | +}; |
| 226 | + |
| 227 | +static struct platform_device pronghorn_i2c_gpio = { |
| 228 | + .name = "i2c-gpio", |
| 229 | + .id = 0, |
| 230 | + .dev = { |
| 231 | + .platform_data = &pronghorn_i2c_gpio_data, |
| 232 | + }, |
| 233 | +}; |
| 234 | + |
| 235 | +static struct gpio_led pronghorn_led_pin[] = { |
| 236 | + { |
| 237 | + .name = "pronghorn:green:status", |
| 238 | + .gpio = 7, |
| 239 | + } |
| 240 | +}; |
| 241 | + |
| 242 | +static struct gpio_led_platform_data pronghorn_led_data = { |
| 243 | + .num_leds = 1, |
| 244 | + .leds = pronghorn_led_pin, |
| 245 | +}; |
| 246 | + |
| 247 | +static struct platform_device pronghorn_led = { |
| 248 | + .name = "leds-gpio", |
| 249 | + .id = -1, |
| 250 | + .dev.platform_data = &pronghorn_led_data, |
| 251 | +}; |
| 252 | + |
| 253 | +static struct resource pronghorn_pata_resources[] = { |
| 254 | + { |
| 255 | + .flags = IORESOURCE_MEM |
| 256 | + }, |
| 257 | + { |
| 258 | + .flags = IORESOURCE_MEM, |
| 259 | + }, |
| 260 | + { |
| 261 | + .name = "intrq", |
| 262 | + .start = IRQ_IXP4XX_GPIO0, |
| 263 | + .end = IRQ_IXP4XX_GPIO0, |
| 264 | + .flags = IORESOURCE_IRQ, |
| 265 | + }, |
| 266 | +}; |
| 267 | + |
| 268 | +static struct ixp4xx_pata_data pronghorn_pata_data = { |
| 269 | + .cs0_bits = 0xbfff0043, |
| 270 | + .cs1_bits = 0xbfff0043, |
| 271 | +}; |
| 272 | + |
| 273 | +static struct platform_device pronghorn_pata = { |
| 274 | + .name = "pata_ixp4xx_cf", |
| 275 | + .id = 0, |
| 276 | + .dev.platform_data = &pronghorn_pata_data, |
| 277 | + .num_resources = ARRAY_SIZE(pronghorn_pata_resources), |
| 278 | + .resource = pronghorn_pata_resources, |
| 279 | +}; |
| 280 | + |
| 281 | +static struct eth_plat_info pronghorn_plat_eth[] = { |
| 282 | + { |
| 283 | + .phy = 0, |
| 284 | + .rxq = 3, |
| 285 | + .txreadyq = 20, |
| 286 | + }, { |
| 287 | + .phy = 1, |
| 288 | + .rxq = 4, |
| 289 | + .txreadyq = 21, |
| 290 | + } |
| 291 | +}; |
| 292 | + |
| 293 | +static struct platform_device pronghorn_eth[] = { |
| 294 | + { |
| 295 | + .name = "ixp4xx_eth", |
| 296 | + .id = IXP4XX_ETH_NPEB, |
| 297 | + .dev.platform_data = pronghorn_plat_eth, |
| 298 | + }, { |
| 299 | + .name = "ixp4xx_eth", |
| 300 | + .id = IXP4XX_ETH_NPEC, |
| 301 | + .dev.platform_data = pronghorn_plat_eth + 1, |
| 302 | + } |
| 303 | +}; |
| 304 | + |
| 305 | +static struct platform_device *pronghorn_devices[] __initdata = { |
| 306 | + &pronghorn_flash, |
| 307 | + &pronghorn_uart, |
| 308 | + &pronghorn_led, |
| 309 | + &pronghorn_eth[0], |
| 310 | + &pronghorn_eth[1], |
| 311 | +}; |
| 312 | + |
| 313 | +static void __init pronghorn_init(void) |
| 314 | +{ |
| 315 | + ixp4xx_sys_init(); |
| 316 | + |
| 317 | + pronghorn_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 318 | + pronghorn_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 319 | + |
| 320 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 321 | + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 322 | + |
| 323 | + platform_add_devices(pronghorn_devices, ARRAY_SIZE(pronghorn_devices)); |
| 324 | + |
| 325 | + if (machine_is_pronghorn()) { |
| 326 | + pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(2); |
| 327 | + pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(2); |
| 328 | + |
| 329 | + pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(3); |
| 330 | + pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(3); |
| 331 | + |
| 332 | + pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS2; |
| 333 | + pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS3; |
| 334 | + } else { |
| 335 | + pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(3); |
| 336 | + pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(3); |
| 337 | + |
| 338 | + pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(4); |
| 339 | + pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(4); |
| 340 | + |
| 341 | + pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS3; |
| 342 | + pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS4; |
| 343 | + |
| 344 | + platform_device_register(&pronghorn_i2c_gpio); |
| 345 | + } |
| 346 | + |
| 347 | + platform_device_register(&pronghorn_pata); |
| 348 | +} |
| 349 | + |
| 350 | +MACHINE_START(PRONGHORN, "ADI Engineering Pronghorn") |
| 351 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 352 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 353 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 354 | + .map_io = ixp4xx_map_io, |
| 355 | + .init_irq = ixp4xx_init_irq, |
| 356 | + .timer = &ixp4xx_timer, |
| 357 | + .boot_params = 0x0100, |
| 358 | + .init_machine = pronghorn_init, |
| 359 | +MACHINE_END |
| 360 | + |
| 361 | +MACHINE_START(PRONGHORNMETRO, "ADI Engineering Pronghorn Metro") |
| 362 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 363 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 364 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 365 | + .map_io = ixp4xx_map_io, |
| 366 | + .init_irq = ixp4xx_init_irq, |
| 367 | + .timer = &ixp4xx_timer, |
| 368 | + .boot_params = 0x0100, |
| 369 | + .init_machine = pronghorn_init, |
| 370 | +MACHINE_END |
| 371 | --- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h |
| 372 | @@ -41,7 +41,8 @@ static __inline__ void __arch_decomp_set |
| 373 | * Some boards are using UART2 as console |
| 374 | */ |
| 375 | if (machine_is_adi_coyote() || machine_is_gtwx5715() || |
| 376 | - machine_is_gateway7001() || machine_is_wg302v2()) |
| 377 | + machine_is_gateway7001() || machine_is_wg302v2() || |
| 378 | + machine_is_pronghorn() || machine_is_pronghorn_metro()) |
| 379 | uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; |
| 380 | else |
| 381 | uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; |
target/linux/ixp4xx/patches-2.6.33/115-sidewinder_support.patch |
| 1 | From 60bdaaaf3446b4237566c6e04855186fc7bd766b Mon Sep 17 00:00:00 2001 |
| 2 | From: Imre Kaloz <kaloz@openwrt.org> |
| 3 | Date: Sun, 13 Jul 2008 22:46:45 +0200 |
| 4 | Subject: [PATCH] Add support for the ADI Sidewinder |
| 5 | |
| 6 | Signed-off-by: Imre Kaloz <kaloz@openwrt.org> |
| 7 | --- |
| 8 | arch/arm/mach-ixp4xx/Kconfig | 10 ++- |
| 9 | arch/arm/mach-ixp4xx/Makefile | 2 + |
| 10 | arch/arm/mach-ixp4xx/sidewinder-pci.c | 68 ++++++++++++++ |
| 11 | arch/arm/mach-ixp4xx/sidewinder-setup.c | 151 +++++++++++++++++++++++++++++++ |
| 12 | 4 files changed, 230 insertions(+), 1 deletions(-) |
| 13 | create mode 100644 arch/arm/mach-ixp4xx/sidewinder-pci.c |
| 14 | create mode 100644 arch/arm/mach-ixp4xx/sidewinder-setup.c |
| 15 | |
| 16 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 17 | @@ -81,6 +81,14 @@ config MACH_PRONGHORN |
| 18 | config MACH_PRONGHORNMETRO |
| 19 | def_bool MACH_PRONGHORN |
| 20 | |
| 21 | +config MACH_SIDEWINDER |
| 22 | + bool "ADI Sidewinder" |
| 23 | + select PCI |
| 24 | + help |
| 25 | + Say 'Y' here if you want your kernel to support the ADI |
| 26 | + Engineering Sidewinder board. For more information on this |
| 27 | + platform, see http://www.adiengineering.com |
| 28 | + |
| 29 | config ARCH_IXDP425 |
| 30 | bool "IXDP425" |
| 31 | help |
| 32 | @@ -169,7 +177,7 @@ config MACH_FSG |
| 33 | # |
| 34 | config CPU_IXP46X |
| 35 | bool |
| 36 | - depends on MACH_IXDP465 |
| 37 | + depends on MACH_IXDP465 || MACH_SIDEWINDER |
| 38 | default y |
| 39 | |
| 40 | config CPU_IXP43X |
| 41 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 42 | @@ -18,6 +18,7 @@ obj-pci-$(CONFIG_MACH_WG302V1) += wg302 |
| 43 | obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o |
| 44 | obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o |
| 45 | obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o |
| 46 | +obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o |
| 47 | |
| 48 | obj-y += common.o |
| 49 | |
| 50 | @@ -35,6 +36,7 @@ obj-$(CONFIG_MACH_WG302V2) += wg302v2-se |
| 51 | obj-$(CONFIG_MACH_FSG) += fsg-setup.o |
| 52 | obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o |
| 53 | obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o |
| 54 | +obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o |
| 55 | |
| 56 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 57 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 58 | --- /dev/null |
| 59 | @@ -0,0 +1,68 @@ |
| 60 | +/* |
| 61 | + * arch/arch/mach-ixp4xx/pronghornmetro-pci.c |
| 62 | + * |
| 63 | + * PCI setup routines for ADI Engineering Sidewinder |
| 64 | + * |
| 65 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 66 | + * |
| 67 | + * based on coyote-pci.c: |
| 68 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 69 | + * Copyright (C) 2003 MontaVista Softwrae, Inc. |
| 70 | + * |
| 71 | + * Maintainer: Imre Kaloz <kaloz@openwrt.org> |
| 72 | + * |
| 73 | + * This program is free software; you can redistribute it and/or modify |
| 74 | + * it under the terms of the GNU General Public License version 2 as |
| 75 | + * published by the Free Software Foundation. |
| 76 | + * |
| 77 | + */ |
| 78 | + |
| 79 | +#include <linux/kernel.h> |
| 80 | +#include <linux/pci.h> |
| 81 | +#include <linux/init.h> |
| 82 | +#include <linux/irq.h> |
| 83 | + |
| 84 | +#include <asm/mach-types.h> |
| 85 | +#include <mach/hardware.h> |
| 86 | +#include <asm/irq.h> |
| 87 | + |
| 88 | +#include <asm/mach/pci.h> |
| 89 | + |
| 90 | +void __init sidewinder_pci_preinit(void) |
| 91 | +{ |
| 92 | + set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); |
| 93 | + set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); |
| 94 | + set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); |
| 95 | + |
| 96 | + ixp4xx_pci_preinit(); |
| 97 | +} |
| 98 | + |
| 99 | +static int __init sidewinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 100 | +{ |
| 101 | + if (slot == 1) |
| 102 | + return IRQ_IXP4XX_GPIO11; |
| 103 | + else if (slot == 2) |
| 104 | + return IRQ_IXP4XX_GPIO10; |
| 105 | + else if (slot == 3) |
| 106 | + return IRQ_IXP4XX_GPIO9; |
| 107 | + else |
| 108 | + return -1; |
| 109 | +} |
| 110 | + |
| 111 | +struct hw_pci sidewinder_pci __initdata = { |
| 112 | + .nr_controllers = 1, |
| 113 | + .preinit = sidewinder_pci_preinit, |
| 114 | + .swizzle = pci_std_swizzle, |
| 115 | + .setup = ixp4xx_setup, |
| 116 | + .scan = ixp4xx_scan_bus, |
| 117 | + .map_irq = sidewinder_map_irq, |
| 118 | +}; |
| 119 | + |
| 120 | +int __init sidewinder_pci_init(void) |
| 121 | +{ |
| 122 | + if (machine_is_sidewinder()) |
| 123 | + pci_common_init(&sidewinder_pci); |
| 124 | + return 0; |
| 125 | +} |
| 126 | + |
| 127 | +subsys_initcall(sidewinder_pci_init); |
| 128 | --- /dev/null |
| 129 | @@ -0,0 +1,149 @@ |
| 130 | +/* |
| 131 | + * arch/arm/mach-ixp4xx/sidewinder-setup.c |
| 132 | + * |
| 133 | + * Board setup for the ADI Engineering Sidewinder |
| 134 | + * |
| 135 | + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org> |
| 136 | + * |
| 137 | + * based on coyote-setup.c: |
| 138 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 139 | + * |
| 140 | + * Author: Imre Kaloz <Kaloz@openwrt.org> |
| 141 | + */ |
| 142 | + |
| 143 | +#include <linux/kernel.h> |
| 144 | +#include <linux/serial.h> |
| 145 | +#include <linux/serial_8250.h> |
| 146 | + |
| 147 | +#include <asm/mach-types.h> |
| 148 | +#include <asm/mach/arch.h> |
| 149 | +#include <asm/mach/flash.h> |
| 150 | + |
| 151 | +static struct flash_platform_data sidewinder_flash_data = { |
| 152 | + .map_name = "cfi_probe", |
| 153 | + .width = 2, |
| 154 | +}; |
| 155 | + |
| 156 | +static struct resource sidewinder_flash_resource = { |
| 157 | + .flags = IORESOURCE_MEM, |
| 158 | +}; |
| 159 | + |
| 160 | +static struct platform_device sidewinder_flash = { |
| 161 | + .name = "IXP4XX-Flash", |
| 162 | + .id = 0, |
| 163 | + .dev = { |
| 164 | + .platform_data = &sidewinder_flash_data, |
| 165 | + }, |
| 166 | + .num_resources = 1, |
| 167 | + .resource = &sidewinder_flash_resource, |
| 168 | +}; |
| 169 | + |
| 170 | +static struct resource sidewinder_uart_resources[] = { |
| 171 | + { |
| 172 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 173 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 174 | + .flags = IORESOURCE_MEM, |
| 175 | + }, |
| 176 | + { |
| 177 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 178 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 179 | + .flags = IORESOURCE_MEM, |
| 180 | + } |
| 181 | +}; |
| 182 | + |
| 183 | +static struct plat_serial8250_port sidewinder_uart_data[] = { |
| 184 | + { |
| 185 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 186 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 187 | + .irq = IRQ_IXP4XX_UART1, |
| 188 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 189 | + .iotype = UPIO_MEM, |
| 190 | + .regshift = 2, |
| 191 | + .uartclk = IXP4XX_UART_XTAL, |
| 192 | + }, |
| 193 | + { |
| 194 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 195 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 196 | + .irq = IRQ_IXP4XX_UART2, |
| 197 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 198 | + .iotype = UPIO_MEM, |
| 199 | + .regshift = 2, |
| 200 | + .uartclk = IXP4XX_UART_XTAL, |
| 201 | + }, |
| 202 | + { }, |
| 203 | +}; |
| 204 | + |
| 205 | +static struct platform_device sidewinder_uart = { |
| 206 | + .name = "serial8250", |
| 207 | + .id = PLAT8250_DEV_PLATFORM, |
| 208 | + .dev = { |
| 209 | + .platform_data = sidewinder_uart_data, |
| 210 | + }, |
| 211 | + .num_resources = ARRAY_SIZE(sidewinder_uart_resources), |
| 212 | + .resource = sidewinder_uart_resources, |
| 213 | +}; |
| 214 | + |
| 215 | +static struct eth_plat_info sidewinder_plat_eth[] = { |
| 216 | + { |
| 217 | + .phy = 5, |
| 218 | + .rxq = 3, |
| 219 | + .txreadyq = 20, |
| 220 | + }, { |
| 221 | + .phy = IXP4XX_ETH_PHY_MAX_ADDR, |
| 222 | + .phy_mask = 0x1e, |
| 223 | + .rxq = 4, |
| 224 | + .txreadyq = 21, |
| 225 | + }, { |
| 226 | + .phy = 31, |
| 227 | + .rxq = 2, |
| 228 | + .txreadyq = 19, |
| 229 | + } |
| 230 | +}; |
| 231 | + |
| 232 | +static struct platform_device sidewinder_eth[] = { |
| 233 | + { |
| 234 | + .name = "ixp4xx_eth", |
| 235 | + .id = IXP4XX_ETH_NPEB, |
| 236 | + .dev.platform_data = sidewinder_plat_eth, |
| 237 | + }, { |
| 238 | + .name = "ixp4xx_eth", |
| 239 | + .id = IXP4XX_ETH_NPEC, |
| 240 | + .dev.platform_data = sidewinder_plat_eth + 1, |
| 241 | + }, { |
| 242 | + .name = "ixp4xx_eth", |
| 243 | + .id = IXP4XX_ETH_NPEA, |
| 244 | + .dev.platform_data = sidewinder_plat_eth + 2, |
| 245 | + } |
| 246 | +}; |
| 247 | + |
| 248 | +static struct platform_device *sidewinder_devices[] __initdata = { |
| 249 | + &sidewinder_flash, |
| 250 | + &sidewinder_uart, |
| 251 | + &sidewinder_eth[0], |
| 252 | + &sidewinder_eth[1], |
| 253 | + &sidewinder_eth[2], |
| 254 | +}; |
| 255 | + |
| 256 | +static void __init sidewinder_init(void) |
| 257 | +{ |
| 258 | + ixp4xx_sys_init(); |
| 259 | + |
| 260 | + sidewinder_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 261 | + sidewinder_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_64M - 1; |
| 262 | + |
| 263 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 264 | + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 265 | + |
| 266 | + platform_add_devices(sidewinder_devices, ARRAY_SIZE(sidewinder_devices)); |
| 267 | +} |
| 268 | + |
| 269 | +MACHINE_START(SIDEWINDER, "ADI Engineering Sidewinder") |
| 270 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 271 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 272 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 273 | + .map_io = ixp4xx_map_io, |
| 274 | + .init_irq = ixp4xx_init_irq, |
| 275 | + .timer = &ixp4xx_timer, |
| 276 | + .boot_params = 0x0100, |
| 277 | + .init_machine = sidewinder_init, |
| 278 | +MACHINE_END |
target/linux/ixp4xx/patches-2.6.33/120-compex_support.patch |
| 1 | From 24025a2dcf1248079dd3019fac6ed955252d277f Mon Sep 17 00:00:00 2001 |
| 2 | From: Imre Kaloz <kaloz@openwrt.org> |
| 3 | Date: Mon, 14 Jul 2008 21:56:34 +0200 |
| 4 | Subject: [PATCH] Add support for the Compex WP18 / NP18A boards |
| 5 | |
| 6 | Signed-off-by: Imre Kaloz <kaloz@openwrt.org> |
| 7 | --- |
| 8 | arch/arm/mach-ixp4xx/Kconfig | 8 ++ |
| 9 | arch/arm/mach-ixp4xx/Makefile | 2 + |
| 10 | arch/arm/mach-ixp4xx/compex-setup.c | 136 +++++++++++++++++++++++++++++++++++ |
| 11 | arch/arm/mach-ixp4xx/ixdp425-pci.c | 3 +- |
| 12 | arch/arm/tools/mach-types | 2 +- |
| 13 | 5 files changed, 149 insertions(+), 2 deletions(-) |
| 14 | create mode 100644 arch/arm/mach-ixp4xx/compex-setup.c |
| 15 | |
| 16 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 17 | @@ -89,6 +89,14 @@ config MACH_SIDEWINDER |
| 18 | Engineering Sidewinder board. For more information on this |
| 19 | platform, see http://www.adiengineering.com |
| 20 | |
| 21 | +config MACH_COMPEX |
| 22 | + bool "Compex WP18 / NP18A" |
| 23 | + select PCI |
| 24 | + help |
| 25 | + Say 'Y' here if you want your kernel to support Compex' |
| 26 | + WP18 or NP18A boards. For more information on this |
| 27 | + platform, see http://www.compex.com.sg/home/OEM/product_ap.htm |
| 28 | + |
| 29 | config ARCH_IXDP425 |
| 30 | bool "IXDP425" |
| 31 | help |
| 32 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 33 | @@ -19,6 +19,7 @@ obj-pci-$(CONFIG_MACH_WG302V2) += wg302 |
| 34 | obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o |
| 35 | obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o |
| 36 | obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o |
| 37 | +obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o |
| 38 | |
| 39 | obj-y += common.o |
| 40 | |
| 41 | @@ -37,6 +38,7 @@ obj-$(CONFIG_MACH_FSG) += fsg-setup.o |
| 42 | obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o |
| 43 | obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o |
| 44 | obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o |
| 45 | +obj-$(CONFIG_MACH_COMPEX) += compex-setup.o |
| 46 | |
| 47 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 48 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 49 | --- /dev/null |
| 50 | @@ -0,0 +1,136 @@ |
| 51 | +/* |
| 52 | + * arch/arm/mach-ixp4xx/compex-setup.c |
| 53 | + * |
| 54 | + * Compex WP18 / NP18A board-setup |
| 55 | + * |
| 56 | + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org> |
| 57 | + * |
| 58 | + * based on coyote-setup.c: |
| 59 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 60 | + * |
| 61 | + * Author: Imre Kaloz <Kaloz@openwrt.org> |
| 62 | + */ |
| 63 | + |
| 64 | +#include <linux/kernel.h> |
| 65 | +#include <linux/serial.h> |
| 66 | +#include <linux/serial_8250.h> |
| 67 | + |
| 68 | +#include <asm/mach-types.h> |
| 69 | +#include <asm/mach/arch.h> |
| 70 | +#include <asm/mach/flash.h> |
| 71 | + |
| 72 | +static struct flash_platform_data compex_flash_data = { |
| 73 | + .map_name = "cfi_probe", |
| 74 | + .width = 2, |
| 75 | +}; |
| 76 | + |
| 77 | +static struct resource compex_flash_resource = { |
| 78 | + .flags = IORESOURCE_MEM, |
| 79 | +}; |
| 80 | + |
| 81 | +static struct platform_device compex_flash = { |
| 82 | + .name = "IXP4XX-Flash", |
| 83 | + .id = 0, |
| 84 | + .dev = { |
| 85 | + .platform_data = &compex_flash_data, |
| 86 | + }, |
| 87 | + .num_resources = 1, |
| 88 | + .resource = &compex_flash_resource, |
| 89 | +}; |
| 90 | + |
| 91 | +static struct resource compex_uart_resources[] = { |
| 92 | + { |
| 93 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 94 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 95 | + .flags = IORESOURCE_MEM |
| 96 | + }, |
| 97 | + { |
| 98 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 99 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 100 | + .flags = IORESOURCE_MEM |
| 101 | + } |
| 102 | +}; |
| 103 | + |
| 104 | +static struct plat_serial8250_port compex_uart_data[] = { |
| 105 | + { |
| 106 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 107 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 108 | + .irq = IRQ_IXP4XX_UART1, |
| 109 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 110 | + .iotype = UPIO_MEM, |
| 111 | + .regshift = 2, |
| 112 | + .uartclk = IXP4XX_UART_XTAL, |
| 113 | + }, |
| 114 | + { |
| 115 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 116 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 117 | + .irq = IRQ_IXP4XX_UART2, |
| 118 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 119 | + .iotype = UPIO_MEM, |
| 120 | + .regshift = 2, |
| 121 | + .uartclk = IXP4XX_UART_XTAL, |
| 122 | + }, |
| 123 | + { }, |
| 124 | +}; |
| 125 | + |
| 126 | +static struct platform_device compex_uart = { |
| 127 | + .name = "serial8250", |
| 128 | + .id = PLAT8250_DEV_PLATFORM, |
| 129 | + .dev.platform_data = compex_uart_data, |
| 130 | + .num_resources = 2, |
| 131 | + .resource = compex_uart_resources, |
| 132 | +}; |
| 133 | + |
| 134 | +static struct eth_plat_info compex_plat_eth[] = { |
| 135 | + { |
| 136 | + .phy = IXP4XX_ETH_PHY_MAX_ADDR, |
| 137 | + .phy_mask = 0xf0000, |
| 138 | + .rxq = 3, |
| 139 | + .txreadyq = 20, |
| 140 | + }, { |
| 141 | + .phy = 3, |
| 142 | + .rxq = 4, |
| 143 | + .txreadyq = 21, |
| 144 | + } |
| 145 | +}; |
| 146 | + |
| 147 | +static struct platform_device compex_eth[] = { |
| 148 | + { |
| 149 | + .name = "ixp4xx_eth", |
| 150 | + .id = IXP4XX_ETH_NPEB, |
| 151 | + .dev.platform_data = compex_plat_eth, |
| 152 | + }, { |
| 153 | + .name = "ixp4xx_eth", |
| 154 | + .id = IXP4XX_ETH_NPEC, |
| 155 | + .dev.platform_data = compex_plat_eth + 1, |
| 156 | + } |
| 157 | +}; |
| 158 | + |
| 159 | +static struct platform_device *compex_devices[] __initdata = { |
| 160 | + &compex_flash, |
| 161 | + &compex_uart, |
| 162 | + &compex_eth[0], |
| 163 | + &compex_eth[1], |
| 164 | +}; |
| 165 | + |
| 166 | +static void __init compex_init(void) |
| 167 | +{ |
| 168 | + ixp4xx_sys_init(); |
| 169 | + |
| 170 | + compex_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 171 | + compex_flash_resource.end = |
| 172 | + IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 173 | + |
| 174 | + platform_add_devices(compex_devices, ARRAY_SIZE(compex_devices)); |
| 175 | +} |
| 176 | + |
| 177 | +MACHINE_START(COMPEX, "Compex WP18 / NP18A") |
| 178 | + /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */ |
| 179 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 180 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 181 | + .map_io = ixp4xx_map_io, |
| 182 | + .init_irq = ixp4xx_init_irq, |
| 183 | + .timer = &ixp4xx_timer, |
| 184 | + .boot_params = 0x0100, |
| 185 | + .init_machine = compex_init, |
| 186 | +MACHINE_END |
| 187 | --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c |
| 188 | @@ -70,7 +70,8 @@ struct hw_pci ixdp425_pci __initdata = { |
| 189 | int __init ixdp425_pci_init(void) |
| 190 | { |
| 191 | if (machine_is_ixdp425() || machine_is_ixcdp1100() || |
| 192 | - machine_is_ixdp465() || machine_is_kixrp435()) |
| 193 | + machine_is_ixdp465() || machine_is_kixrp435() || |
| 194 | + machine_is_compex()) |
| 195 | pci_common_init(&ixdp425_pci); |
| 196 | return 0; |
| 197 | } |
| 198 | --- a/arch/arm/tools/mach-types |
| 199 | @@ -1273,7 +1273,7 @@ oiab MACH_OIAB OIAB 1269 |
| 200 | smdk6400 MACH_SMDK6400 SMDK6400 1270 |
| 201 | nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271 |
| 202 | greenphone MACH_GREENPHONE GREENPHONE 1272 |
| 203 | -compex42x MACH_COMPEXWP18 COMPEXWP18 1273 |
| 204 | +compex MACH_COMPEX COMPEX 1273 |
| 205 | xmate MACH_XMATE XMATE 1274 |
| 206 | energizer MACH_ENERGIZER ENERGIZER 1275 |
| 207 | ime1 MACH_IME1 IME1 1276 |
target/linux/ixp4xx/patches-2.6.33/130-wrt300nv2_support.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 2 | @@ -97,6 +97,14 @@ config MACH_COMPEX |
| 3 | WP18 or NP18A boards. For more information on this |
| 4 | platform, see http://www.compex.com.sg/home/OEM/product_ap.htm |
| 5 | |
| 6 | +config MACH_WRT300NV2 |
| 7 | + bool "Linksys WRT300N v2" |
| 8 | + select PCI |
| 9 | + help |
| 10 | + Say 'Y' here if you want your kernel to support Linksys' |
| 11 | + WRT300N v2 router. For more information on this |
| 12 | + platform, see http://openwrt.org |
| 13 | + |
| 14 | config ARCH_IXDP425 |
| 15 | bool "IXDP425" |
| 16 | help |
| 17 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 18 | @@ -20,6 +20,7 @@ obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o |
| 19 | obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o |
| 20 | obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o |
| 21 | obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o |
| 22 | +obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o |
| 23 | |
| 24 | obj-y += common.o |
| 25 | |
| 26 | @@ -39,6 +40,7 @@ obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_ |
| 27 | obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o |
| 28 | obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o |
| 29 | obj-$(CONFIG_MACH_COMPEX) += compex-setup.o |
| 30 | +obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o |
| 31 | |
| 32 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 33 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 34 | --- /dev/null |
| 35 | @@ -0,0 +1,65 @@ |
| 36 | +/* |
| 37 | + * arch/arch/mach-ixp4xx/wrt300nv2-pci.c |
| 38 | + * |
| 39 | + * PCI setup routines for Linksys WRT300N v2 |
| 40 | + * |
| 41 | + * Copyright (C) 2007 Imre Kaloz <kaloz@openwrt.org> |
| 42 | + * |
| 43 | + * based on coyote-pci.c: |
| 44 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 45 | + * Copyright (C) 2003 MontaVista Softwrae, Inc. |
| 46 | + * |
| 47 | + * Maintainer: Imre Kaloz <kaloz@openwrt.org> |
| 48 | + * |
| 49 | + * This program is free software; you can redistribute it and/or modify |
| 50 | + * it under the terms of the GNU General Public License version 2 as |
| 51 | + * published by the Free Software Foundation. |
| 52 | + * |
| 53 | + */ |
| 54 | + |
| 55 | +#include <linux/kernel.h> |
| 56 | +#include <linux/pci.h> |
| 57 | +#include <linux/init.h> |
| 58 | +#include <linux/irq.h> |
| 59 | + |
| 60 | +#include <asm/mach-types.h> |
| 61 | +#include <mach/hardware.h> |
| 62 | +#include <asm/irq.h> |
| 63 | + |
| 64 | +#include <asm/mach/pci.h> |
| 65 | + |
| 66 | +extern void ixp4xx_pci_preinit(void); |
| 67 | +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); |
| 68 | +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); |
| 69 | + |
| 70 | +void __init wrt300nv2_pci_preinit(void) |
| 71 | +{ |
| 72 | + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); |
| 73 | + |
| 74 | + ixp4xx_pci_preinit(); |
| 75 | +} |
| 76 | + |
| 77 | +static int __init wrt300nv2_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 78 | +{ |
| 79 | + if (slot == 1) |
| 80 | + return IRQ_IXP4XX_GPIO8; |
| 81 | + else return -1; |
| 82 | +} |
| 83 | + |
| 84 | +struct hw_pci wrt300nv2_pci __initdata = { |
| 85 | + .nr_controllers = 1, |
| 86 | + .preinit = wrt300nv2_pci_preinit, |
| 87 | + .swizzle = pci_std_swizzle, |
| 88 | + .setup = ixp4xx_setup, |
| 89 | + .scan = ixp4xx_scan_bus, |
| 90 | + .map_irq = wrt300nv2_map_irq, |
| 91 | +}; |
| 92 | + |
| 93 | +int __init wrt300nv2_pci_init(void) |
| 94 | +{ |
| 95 | + if (machine_is_wrt300nv2()) |
| 96 | + pci_common_init(&wrt300nv2_pci); |
| 97 | + return 0; |
| 98 | +} |
| 99 | + |
| 100 | +subsys_initcall(wrt300nv2_pci_init); |
| 101 | --- /dev/null |
| 102 | @@ -0,0 +1,108 @@ |
| 103 | +/* |
| 104 | + * arch/arm/mach-ixp4xx/wrt300nv2-setup.c |
| 105 | + * |
| 106 | + * Board setup for the Linksys WRT300N v2 |
| 107 | + * |
| 108 | + * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org> |
| 109 | + * |
| 110 | + * based on coyote-setup.c: |
| 111 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 112 | + * |
| 113 | + * Author: Imre Kaloz <Kaloz@openwrt.org> |
| 114 | + */ |
| 115 | + |
| 116 | +#include <linux/kernel.h> |
| 117 | +#include <linux/init.h> |
| 118 | +#include <linux/device.h> |
| 119 | +#include <linux/serial.h> |
| 120 | +#include <linux/tty.h> |
| 121 | +#include <linux/serial_8250.h> |
| 122 | +#include <linux/slab.h> |
| 123 | + |
| 124 | +#include <asm/types.h> |
| 125 | +#include <asm/setup.h> |
| 126 | +#include <asm/memory.h> |
| 127 | +#include <mach/hardware.h> |
| 128 | +#include <asm/irq.h> |
| 129 | +#include <asm/mach-types.h> |
| 130 | +#include <asm/mach/arch.h> |
| 131 | +#include <asm/mach/flash.h> |
| 132 | + |
| 133 | +static struct flash_platform_data wrt300nv2_flash_data = { |
| 134 | + .map_name = "cfi_probe", |
| 135 | + .width = 2, |
| 136 | +}; |
| 137 | + |
| 138 | +static struct resource wrt300nv2_flash_resource = { |
| 139 | + .flags = IORESOURCE_MEM, |
| 140 | +}; |
| 141 | + |
| 142 | +static struct platform_device wrt300nv2_flash = { |
| 143 | + .name = "IXP4XX-Flash", |
| 144 | + .id = 0, |
| 145 | + .dev = { |
| 146 | + .platform_data = &wrt300nv2_flash_data, |
| 147 | + }, |
| 148 | + .num_resources = 1, |
| 149 | + .resource = &wrt300nv2_flash_resource, |
| 150 | +}; |
| 151 | + |
| 152 | +static struct resource wrt300nv2_uart_resource = { |
| 153 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 154 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 155 | + .flags = IORESOURCE_MEM, |
| 156 | +}; |
| 157 | + |
| 158 | +static struct plat_serial8250_port wrt300nv2_uart_data[] = { |
| 159 | + { |
| 160 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 161 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 162 | + .irq = IRQ_IXP4XX_UART2, |
| 163 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 164 | + .iotype = UPIO_MEM, |
| 165 | + .regshift = 2, |
| 166 | + .uartclk = IXP4XX_UART_XTAL, |
| 167 | + }, |
| 168 | + { }, |
| 169 | +}; |
| 170 | + |
| 171 | +static struct platform_device wrt300nv2_uart = { |
| 172 | + .name = "serial8250", |
| 173 | + .id = PLAT8250_DEV_PLATFORM, |
| 174 | + .dev = { |
| 175 | + .platform_data = wrt300nv2_uart_data, |
| 176 | + }, |
| 177 | + .num_resources = 1, |
| 178 | + .resource = &wrt300nv2_uart_resource, |
| 179 | +}; |
| 180 | + |
| 181 | +static struct platform_device *wrt300nv2_devices[] __initdata = { |
| 182 | + &wrt300nv2_flash, |
| 183 | + &wrt300nv2_uart |
| 184 | +}; |
| 185 | + |
| 186 | +static void __init wrt300nv2_init(void) |
| 187 | +{ |
| 188 | + ixp4xx_sys_init(); |
| 189 | + |
| 190 | + wrt300nv2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 191 | + wrt300nv2_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 192 | + |
| 193 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 194 | + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 195 | + |
| 196 | + platform_add_devices(wrt300nv2_devices, ARRAY_SIZE(wrt300nv2_devices)); |
| 197 | +} |
| 198 | + |
| 199 | +#ifdef CONFIG_MACH_WRT300NV2 |
| 200 | +MACHINE_START(WRT300NV2, "Linksys WRT300N v2") |
| 201 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 202 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 203 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 204 | + .map_io = ixp4xx_map_io, |
| 205 | + .init_irq = ixp4xx_init_irq, |
| 206 | + .timer = &ixp4xx_timer, |
| 207 | + .boot_params = 0x0100, |
| 208 | + .init_machine = wrt300nv2_init, |
| 209 | +MACHINE_END |
| 210 | +#endif |
| 211 | --- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h |
| 212 | @@ -42,7 +42,7 @@ static __inline__ void __arch_decomp_set |
| 213 | */ |
| 214 | if (machine_is_adi_coyote() || machine_is_gtwx5715() || |
| 215 | machine_is_gateway7001() || machine_is_wg302v2() || |
| 216 | - machine_is_pronghorn() || machine_is_pronghorn_metro()) |
| 217 | + machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2()) |
| 218 | uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; |
| 219 | else |
| 220 | uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; |
target/linux/ixp4xx/patches-2.6.33/150-lanready_ap1000_support.patch |
| 1 | --- /dev/null |
| 2 | @@ -0,0 +1,151 @@ |
| 3 | +/* |
| 4 | + * arch/arm/mach-ixp4xx/ap1000-setup.c |
| 5 | + * |
| 6 | + * Lanready AP-1000 |
| 7 | + * |
| 8 | + * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org> |
| 9 | + * |
| 10 | + * based on ixdp425-setup.c: |
| 11 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 12 | + * |
| 13 | + * Author: Imre Kaloz <Kaloz@openwrt.org> |
| 14 | + */ |
| 15 | + |
| 16 | +#include <linux/kernel.h> |
| 17 | +#include <linux/init.h> |
| 18 | +#include <linux/device.h> |
| 19 | +#include <linux/serial.h> |
| 20 | +#include <linux/tty.h> |
| 21 | +#include <linux/serial_8250.h> |
| 22 | +#include <linux/slab.h> |
| 23 | + |
| 24 | +#include <asm/types.h> |
| 25 | +#include <asm/setup.h> |
| 26 | +#include <asm/memory.h> |
| 27 | +#include <mach/hardware.h> |
| 28 | +#include <asm/mach-types.h> |
| 29 | +#include <asm/irq.h> |
| 30 | +#include <asm/mach/arch.h> |
| 31 | +#include <asm/mach/flash.h> |
| 32 | + |
| 33 | +static struct flash_platform_data ap1000_flash_data = { |
| 34 | + .map_name = "cfi_probe", |
| 35 | + .width = 2, |
| 36 | +}; |
| 37 | + |
| 38 | +static struct resource ap1000_flash_resource = { |
| 39 | + .flags = IORESOURCE_MEM, |
| 40 | +}; |
| 41 | + |
| 42 | +static struct platform_device ap1000_flash = { |
| 43 | + .name = "IXP4XX-Flash", |
| 44 | + .id = 0, |
| 45 | + .dev = { |
| 46 | + .platform_data = &ap1000_flash_data, |
| 47 | + }, |
| 48 | + .num_resources = 1, |
| 49 | + .resource = &ap1000_flash_resource, |
| 50 | +}; |
| 51 | + |
| 52 | +static struct resource ap1000_uart_resources[] = { |
| 53 | + { |
| 54 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 55 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 56 | + .flags = IORESOURCE_MEM |
| 57 | + }, |
| 58 | + { |
| 59 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 60 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 61 | + .flags = IORESOURCE_MEM |
| 62 | + } |
| 63 | +}; |
| 64 | + |
| 65 | +static struct plat_serial8250_port ap1000_uart_data[] = { |
| 66 | + { |
| 67 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 68 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 69 | + .irq = IRQ_IXP4XX_UART1, |
| 70 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 71 | + .iotype = UPIO_MEM, |
| 72 | + .regshift = 2, |
| 73 | + .uartclk = IXP4XX_UART_XTAL, |
| 74 | + }, |
| 75 | + { |
| 76 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 77 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 78 | + .irq = IRQ_IXP4XX_UART2, |
| 79 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 80 | + .iotype = UPIO_MEM, |
| 81 | + .regshift = 2, |
| 82 | + .uartclk = IXP4XX_UART_XTAL, |
| 83 | + }, |
| 84 | + { }, |
| 85 | +}; |
| 86 | + |
| 87 | +static struct platform_device ap1000_uart = { |
| 88 | + .name = "serial8250", |
| 89 | + .id = PLAT8250_DEV_PLATFORM, |
| 90 | + .dev.platform_data = ap1000_uart_data, |
| 91 | + .num_resources = 2, |
| 92 | + .resource = ap1000_uart_resources |
| 93 | +}; |
| 94 | + |
| 95 | +static struct platform_device *ap1000_devices[] __initdata = { |
| 96 | + &ap1000_flash, |
| 97 | + &ap1000_uart |
| 98 | +}; |
| 99 | + |
| 100 | +static char ap1000_mem_fixup[] __initdata = "mem=64M "; |
| 101 | + |
| 102 | +static void __init ap1000_fixup(struct machine_desc *desc, |
| 103 | + struct tag *tags, char **cmdline, struct meminfo *mi) |
| 104 | + |
| 105 | +{ |
| 106 | + struct tag *t = tags; |
| 107 | + char *p = *cmdline; |
| 108 | + |
| 109 | + /* Find the end of the tags table, taking note of any cmdline tag. */ |
| 110 | + for (; t->hdr.size; t = tag_next(t)) { |
| 111 | + if (t->hdr.tag == ATAG_CMDLINE) { |
| 112 | + p = t->u.cmdline.cmdline; |
| 113 | + } |
| 114 | + } |
| 115 | + |
| 116 | + /* Overwrite the end of the table with a new cmdline tag. */ |
| 117 | + t->hdr.tag = ATAG_CMDLINE; |
| 118 | + t->hdr.size = (sizeof (struct tag_header) + |
| 119 | + strlen(ap1000_mem_fixup) + strlen(p) + 1 + 4) >> 2; |
| 120 | + strlcpy(t->u.cmdline.cmdline, ap1000_mem_fixup, COMMAND_LINE_SIZE); |
| 121 | + strlcpy(t->u.cmdline.cmdline + strlen(ap1000_mem_fixup), p, |
| 122 | + COMMAND_LINE_SIZE - strlen(ap1000_mem_fixup)); |
| 123 | + |
| 124 | + /* Terminate the table. */ |
| 125 | + t = tag_next(t); |
| 126 | + t->hdr.tag = ATAG_NONE; |
| 127 | + t->hdr.size = 0; |
| 128 | +} |
| 129 | + |
| 130 | +static void __init ap1000_init(void) |
| 131 | +{ |
| 132 | + ixp4xx_sys_init(); |
| 133 | + |
| 134 | + ap1000_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 135 | + ap1000_flash_resource.end = |
| 136 | + IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; |
| 137 | + |
| 138 | + platform_add_devices(ap1000_devices, ARRAY_SIZE(ap1000_devices)); |
| 139 | +} |
| 140 | + |
| 141 | +#ifdef CONFIG_MACH_AP1000 |
| 142 | +MACHINE_START(AP1000, "Lanready AP-1000") |
| 143 | + /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */ |
| 144 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 145 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 146 | + .fixup = ap1000_fixup, |
| 147 | + .map_io = ixp4xx_map_io, |
| 148 | + .init_irq = ixp4xx_init_irq, |
| 149 | + .timer = &ixp4xx_timer, |
| 150 | + .boot_params = 0x0100, |
| 151 | + .init_machine = ap1000_init, |
| 152 | +MACHINE_END |
| 153 | +#endif |
| 154 | --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c |
| 155 | @@ -71,7 +71,7 @@ int __init ixdp425_pci_init(void) |
| 156 | { |
| 157 | if (machine_is_ixdp425() || machine_is_ixcdp1100() || |
| 158 | machine_is_ixdp465() || machine_is_kixrp435() || |
| 159 | - machine_is_compex()) |
| 160 | + machine_is_compex() || machine_is_ap1000()) |
| 161 | pci_common_init(&ixdp425_pci); |
| 162 | return 0; |
| 163 | } |
| 164 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 165 | @@ -105,6 +105,14 @@ config MACH_WRT300NV2 |
| 166 | WRT300N v2 router. For more information on this |
| 167 | platform, see http://openwrt.org |
| 168 | |
| 169 | +config MACH_AP1000 |
| 170 | + bool "Lanready AP-1000" |
| 171 | + select PCI |
| 172 | + help |
| 173 | + Say 'Y' here if you want your kernel to support Lanready's |
| 174 | + AP1000 board. For more information on this |
| 175 | + platform, see http://openwrt.org |
| 176 | + |
| 177 | config ARCH_IXDP425 |
| 178 | bool "IXDP425" |
| 179 | help |
| 180 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 181 | @@ -21,6 +21,7 @@ obj-pci-$(CONFIG_MACH_PRONGHORN) += pron |
| 182 | obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o |
| 183 | obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o |
| 184 | obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o |
| 185 | +obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o |
| 186 | |
| 187 | obj-y += common.o |
| 188 | |
| 189 | @@ -41,6 +42,7 @@ obj-$(CONFIG_MACH_PRONGHORN) += pronghor |
| 190 | obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o |
| 191 | obj-$(CONFIG_MACH_COMPEX) += compex-setup.o |
| 192 | obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o |
| 193 | +obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o |
| 194 | |
| 195 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 196 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
target/linux/ixp4xx/patches-2.6.33/180-tw5334_support.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 2 | @@ -164,6 +164,14 @@ config ARCH_PRPMC1100 |
| 3 | PrPCM1100 Processor Mezanine Module. For more information on |
| 4 | this platform, see <file:Documentation/arm/IXP4xx>. |
| 5 | |
| 6 | +config MACH_TW5334 |
| 7 | + bool "Titan Wireless TW-533-4" |
| 8 | + select PCI |
| 9 | + help |
| 10 | + Say 'Y' here if you want your kernel to support the Titan |
| 11 | + Wireless TW533-4. For more information on this platform, |
| 12 | + see http://openwrt.org |
| 13 | + |
| 14 | config MACH_NAS100D |
| 15 | bool |
| 16 | prompt "NAS100D" |
| 17 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 18 | @@ -22,6 +22,7 @@ obj-pci-$(CONFIG_MACH_SIDEWINDER) += sid |
| 19 | obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o |
| 20 | obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o |
| 21 | obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o |
| 22 | +obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o |
| 23 | |
| 24 | obj-y += common.o |
| 25 | |
| 26 | @@ -43,6 +44,7 @@ obj-$(CONFIG_MACH_SIDEWINDER) += sidewin |
| 27 | obj-$(CONFIG_MACH_COMPEX) += compex-setup.o |
| 28 | obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o |
| 29 | obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o |
| 30 | +obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o |
| 31 | |
| 32 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 33 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 34 | --- /dev/null |
| 35 | @@ -0,0 +1,162 @@ |
| 36 | +/* |
| 37 | + * arch/arm/mach-ixp4xx/tw5334-setup.c |
| 38 | + * |
| 39 | + * Board setup for the Titan Wireless TW-533-4 |
| 40 | + * |
| 41 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 42 | + * |
| 43 | + * based on coyote-setup.c: |
| 44 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 45 | + * |
| 46 | + * Author: Imre Kaloz <Kaloz@openwrt.org> |
| 47 | + */ |
| 48 | + |
| 49 | +#include <linux/if_ether.h> |
| 50 | +#include <linux/kernel.h> |
| 51 | +#include <linux/init.h> |
| 52 | +#include <linux/device.h> |
| 53 | +#include <linux/serial.h> |
| 54 | +#include <linux/tty.h> |
| 55 | +#include <linux/serial_8250.h> |
| 56 | +#include <linux/slab.h> |
| 57 | + |
| 58 | +#include <asm/types.h> |
| 59 | +#include <asm/setup.h> |
| 60 | +#include <asm/memory.h> |
| 61 | +#include <mach/hardware.h> |
| 62 | +#include <asm/irq.h> |
| 63 | +#include <asm/mach-types.h> |
| 64 | +#include <asm/mach/arch.h> |
| 65 | +#include <asm/mach/flash.h> |
| 66 | + |
| 67 | +static struct flash_platform_data tw5334_flash_data = { |
| 68 | + .map_name = "cfi_probe", |
| 69 | + .width = 2, |
| 70 | +}; |
| 71 | + |
| 72 | +static struct resource tw5334_flash_resource = { |
| 73 | + .flags = IORESOURCE_MEM, |
| 74 | +}; |
| 75 | + |
| 76 | +static struct platform_device tw5334_flash = { |
| 77 | + .name = "IXP4XX-Flash", |
| 78 | + .id = 0, |
| 79 | + .dev = { |
| 80 | + .platform_data = &tw5334_flash_data, |
| 81 | + }, |
| 82 | + .num_resources = 1, |
| 83 | + .resource = &tw5334_flash_resource, |
| 84 | +}; |
| 85 | + |
| 86 | +static struct resource tw5334_uart_resource = { |
| 87 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 88 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 89 | + .flags = IORESOURCE_MEM, |
| 90 | +}; |
| 91 | + |
| 92 | +static struct plat_serial8250_port tw5334_uart_data[] = { |
| 93 | + { |
| 94 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 95 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 96 | + .irq = IRQ_IXP4XX_UART2, |
| 97 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 98 | + .iotype = UPIO_MEM, |
| 99 | + .regshift = 2, |
| 100 | + .uartclk = IXP4XX_UART_XTAL, |
| 101 | + }, |
| 102 | + { }, |
| 103 | +}; |
| 104 | + |
| 105 | +static struct platform_device tw5334_uart = { |
| 106 | + .name = "serial8250", |
| 107 | + .id = PLAT8250_DEV_PLATFORM, |
| 108 | + .dev = { |
| 109 | + .platform_data = tw5334_uart_data, |
| 110 | + }, |
| 111 | + .num_resources = 1, |
| 112 | + .resource = &tw5334_uart_resource, |
| 113 | +}; |
| 114 | + |
| 115 | +/* Built-in 10/100 Ethernet MAC interfaces */ |
| 116 | +static struct eth_plat_info tw5334_plat_eth[] = { |
| 117 | + { |
| 118 | + .phy = 0, |
| 119 | + .rxq = 3, |
| 120 | + .txreadyq = 20, |
| 121 | + }, { |
| 122 | + .phy = 1, |
| 123 | + .rxq = 4, |
| 124 | + .txreadyq = 21, |
| 125 | + } |
| 126 | +}; |
| 127 | + |
| 128 | +static struct platform_device tw5334_eth[] = { |
| 129 | + { |
| 130 | + .name = "ixp4xx_eth", |
| 131 | + .id = IXP4XX_ETH_NPEB, |
| 132 | + .dev.platform_data = tw5334_plat_eth, |
| 133 | + }, { |
| 134 | + .name = "ixp4xx_eth", |
| 135 | + .id = IXP4XX_ETH_NPEC, |
| 136 | + .dev.platform_data = tw5334_plat_eth + 1, |
| 137 | + } |
| 138 | +}; |
| 139 | + |
| 140 | +static struct platform_device *tw5334_devices[] __initdata = { |
| 141 | + &tw5334_flash, |
| 142 | + &tw5334_uart, |
| 143 | + &tw5334_eth[0], |
| 144 | + &tw5334_eth[1], |
| 145 | +}; |
| 146 | + |
| 147 | +static void __init tw5334_init(void) |
| 148 | +{ |
| 149 | + uint8_t __iomem *f; |
| 150 | + int i; |
| 151 | + |
| 152 | + ixp4xx_sys_init(); |
| 153 | + |
| 154 | + tw5334_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 155 | + tw5334_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 156 | + |
| 157 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 158 | + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 159 | + |
| 160 | + platform_add_devices(tw5334_devices, ARRAY_SIZE(tw5334_devices)); |
| 161 | + |
| 162 | + /* |
| 163 | + * Map in a portion of the flash and read the MAC addresses. |
| 164 | + * Since it is stored in BE in the flash itself, we need to |
| 165 | + * byteswap it if we're in LE mode. |
| 166 | + */ |
| 167 | + f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000); |
| 168 | + if (f) { |
| 169 | + for (i = 0; i < 6; i++) |
| 170 | +#ifdef __ARMEB__ |
| 171 | + tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + i); |
| 172 | + tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + i); |
| 173 | +#else |
| 174 | + tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + (i^3)); |
| 175 | + tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + (i^3)); |
| 176 | +#endif |
| 177 | + iounmap(f); |
| 178 | + } |
| 179 | + |
| 180 | + printk(KERN_INFO "TW-533-4: Using MAC address %pM for port 0\n", |
| 181 | + tw5334_plat_eth[0].hwaddr); |
| 182 | + printk(KERN_INFO "TW-533-4: Using MAC address %pM for port 1\n", |
| 183 | + tw5334_plat_eth[1].hwaddr); |
| 184 | +} |
| 185 | + |
| 186 | +#ifdef CONFIG_MACH_TW5334 |
| 187 | +MACHINE_START(TW5334, "Titan Wireless TW-533-4") |
| 188 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 189 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 190 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 191 | + .map_io = ixp4xx_map_io, |
| 192 | + .init_irq = ixp4xx_init_irq, |
| 193 | + .timer = &ixp4xx_timer, |
| 194 | + .boot_params = 0x0100, |
| 195 | + .init_machine = tw5334_init, |
| 196 | +MACHINE_END |
| 197 | +#endif |
| 198 | --- /dev/null |
| 199 | @@ -0,0 +1,69 @@ |
| 200 | +/* |
| 201 | + * arch/arch/mach-ixp4xx/tw5334-pci.c |
| 202 | + * |
| 203 | + * PCI setup routines for the Titan Wireless TW-533-4 |
| 204 | + * |
| 205 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 206 | + * |
| 207 | + * based on coyote-pci.c: |
| 208 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 209 | + * Copyright (C) 2003 MontaVista Softwrae, Inc. |
| 210 | + * |
| 211 | + * Maintainer: Imre Kaloz <kaloz@openwrt.org> |
| 212 | + * |
| 213 | + * This program is free software; you can redistribute it and/or modify |
| 214 | + * it under the terms of the GNU General Public License version 2 as |
| 215 | + * published by the Free Software Foundation. |
| 216 | + * |
| 217 | + */ |
| 218 | + |
| 219 | +#include <linux/kernel.h> |
| 220 | +#include <linux/pci.h> |
| 221 | +#include <linux/init.h> |
| 222 | +#include <linux/irq.h> |
| 223 | + |
| 224 | +#include <asm/mach-types.h> |
| 225 | +#include <mach/hardware.h> |
| 226 | + |
| 227 | +#include <asm/mach/pci.h> |
| 228 | + |
| 229 | +void __init tw5334_pci_preinit(void) |
| 230 | +{ |
| 231 | + set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); |
| 232 | + set_irq_type(IRQ_IXP4XX_GPIO2, IRQ_TYPE_LEVEL_LOW); |
| 233 | + set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW); |
| 234 | + set_irq_type(IRQ_IXP4XX_GPIO0, IRQ_TYPE_LEVEL_LOW); |
| 235 | + |
| 236 | + ixp4xx_pci_preinit(); |
| 237 | +} |
| 238 | + |
| 239 | +static int __init tw5334_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 240 | +{ |
| 241 | + if (slot == 12) |
| 242 | + return IRQ_IXP4XX_GPIO6; |
| 243 | + else if (slot == 13) |
| 244 | + return IRQ_IXP4XX_GPIO2; |
| 245 | + else if (slot == 14) |
| 246 | + return IRQ_IXP4XX_GPIO1; |
| 247 | + else if (slot == 15) |
| 248 | + return IRQ_IXP4XX_GPIO0; |
| 249 | + else return -1; |
| 250 | +} |
| 251 | + |
| 252 | +struct hw_pci tw5334_pci __initdata = { |
| 253 | + .nr_controllers = 1, |
| 254 | + .preinit = tw5334_pci_preinit, |
| 255 | + .swizzle = pci_std_swizzle, |
| 256 | + .setup = ixp4xx_setup, |
| 257 | + .scan = ixp4xx_scan_bus, |
| 258 | + .map_irq = tw5334_map_irq, |
| 259 | +}; |
| 260 | + |
| 261 | +int __init tw5334_pci_init(void) |
| 262 | +{ |
| 263 | + if (machine_is_tw5334()) |
| 264 | + pci_common_init(&tw5334_pci); |
| 265 | + return 0; |
| 266 | +} |
| 267 | + |
| 268 | +subsys_initcall(tw5334_pci_init); |
| 269 | --- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h |
| 270 | @@ -42,7 +42,8 @@ static __inline__ void __arch_decomp_set |
| 271 | */ |
| 272 | if (machine_is_adi_coyote() || machine_is_gtwx5715() || |
| 273 | machine_is_gateway7001() || machine_is_wg302v2() || |
| 274 | - machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2()) |
| 275 | + machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2() || |
| 276 | + machine_is_tw5334()) |
| 277 | uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; |
| 278 | else |
| 279 | uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; |
target/linux/ixp4xx/patches-2.6.33/185-mi424wr_support.patch |
| 1 | --- /dev/null |
| 2 | @@ -0,0 +1,71 @@ |
| 3 | +/* |
| 4 | + * arch/arm/mach-ixp4xx/mi424wr-pci.c |
| 5 | + * |
| 6 | + * Actiontec MI424WR board-level PCI initialization |
| 7 | + * |
| 8 | + * Copyright (C) 2008 Jose Vasconcellos |
| 9 | + * |
| 10 | + * Maintainer: Jose Vasconcellos <jvasco@verizon.net> |
| 11 | + * |
| 12 | + * This program is free software; you can redistribute it and/or modify |
| 13 | + * it under the terms of the GNU General Public License version 2 as |
| 14 | + * published by the Free Software Foundation. |
| 15 | + * |
| 16 | + */ |
| 17 | + |
| 18 | +#include <linux/kernel.h> |
| 19 | +#include <linux/pci.h> |
| 20 | +#include <linux/init.h> |
| 21 | +#include <linux/irq.h> |
| 22 | + |
| 23 | +#include <asm/mach-types.h> |
| 24 | +#include <asm/mach/pci.h> |
| 25 | + |
| 26 | +/* PCI controller GPIO to IRQ pin mappings |
| 27 | + * This information was obtained from Actiontec's GPL release. |
| 28 | + * |
| 29 | + * INTA INTB |
| 30 | + * SLOT 13 8 6 |
| 31 | + * SLOT 14 7 8 |
| 32 | + * SLOT 15 6 7 |
| 33 | + */ |
| 34 | + |
| 35 | +void __init mi424wr_pci_preinit(void) |
| 36 | +{ |
| 37 | + set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); |
| 38 | + set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); |
| 39 | + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); |
| 40 | + |
| 41 | + ixp4xx_pci_preinit(); |
| 42 | +} |
| 43 | + |
| 44 | +static int __init mi424wr_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 45 | +{ |
| 46 | + if (slot == 13) |
| 47 | + return IRQ_IXP4XX_GPIO8; |
| 48 | + if (slot == 14) |
| 49 | + return IRQ_IXP4XX_GPIO7; |
| 50 | + if (slot == 15) |
| 51 | + return IRQ_IXP4XX_GPIO6; |
| 52 | + |
| 53 | + return -1; |
| 54 | +} |
| 55 | + |
| 56 | +struct hw_pci mi424wr_pci __initdata = { |
| 57 | + .nr_controllers = 1, |
| 58 | + .preinit = mi424wr_pci_preinit, |
| 59 | + .swizzle = pci_std_swizzle, |
| 60 | + .setup = ixp4xx_setup, |
| 61 | + .scan = ixp4xx_scan_bus, |
| 62 | + .map_irq = mi424wr_map_irq, |
| 63 | +}; |
| 64 | + |
| 65 | +int __init mi424wr_pci_init(void) |
| 66 | +{ |
| 67 | + if (machine_is_mi424wr()) |
| 68 | + pci_common_init(&mi424wr_pci); |
| 69 | + return 0; |
| 70 | +} |
| 71 | + |
| 72 | +subsys_initcall(mi424wr_pci_init); |
| 73 | + |
| 74 | --- /dev/null |
| 75 | @@ -0,0 +1,344 @@ |
| 76 | +/* |
| 77 | + * arch/arm/mach-ixp4xx/mi424wr-setup.c |
| 78 | + * |
| 79 | + * Actiontec MI424-WR board setup |
| 80 | + * Copyright (c) 2008 Jose Vasconcellos |
| 81 | + * |
| 82 | + * Based on Gemtek GTWX5715 by |
| 83 | + * Copyright (C) 2004 George T. Joseph |
| 84 | + * Derived from Coyote |
| 85 | + * |
| 86 | + * This program is free software; you can redistribute it and/or |
| 87 | + * modify it under the terms of the GNU General Public License |
| 88 | + * as published by the Free Software Foundation; either version 2 |
| 89 | + * of the License, or (at your option) any later version. |
| 90 | + * |
| 91 | + * This program is distributed in the hope that it will be useful, |
| 92 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 93 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 94 | + * GNU General Public License for more details. |
| 95 | + * |
| 96 | + * You should have received a copy of the GNU General Public License |
| 97 | + * along with this program; if not, write to the Free Software |
| 98 | + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 99 | + * |
| 100 | + */ |
| 101 | + |
| 102 | +#include <linux/init.h> |
| 103 | +#include <linux/device.h> |
| 104 | +#include <linux/serial.h> |
| 105 | +#include <linux/serial_8250.h> |
| 106 | +#include <linux/types.h> |
| 107 | +#include <linux/memory.h> |
| 108 | +#include <linux/leds.h> |
| 109 | +#include <linux/spi/spi_gpio_old.h> |
| 110 | + |
| 111 | +#include <asm/setup.h> |
| 112 | +#include <asm/irq.h> |
| 113 | +#include <asm/io.h> |
| 114 | +#include <asm/mach-types.h> |
| 115 | +#include <asm/mach/arch.h> |
| 116 | +#include <asm/mach/flash.h> |
| 117 | + |
| 118 | +/* |
| 119 | + * GPIO 2,3,4 and 9 are hard wired to the Micrel/Kendin KS8995M Switch |
| 120 | + * and operate as an SPI type interface. The details of the interface |
| 121 | + * are available on Kendin/Micrel's web site. |
| 122 | + */ |
| 123 | + |
| 124 | +#define MI424WR_KSSPI_SELECT 9 |
| 125 | +#define MI424WR_KSSPI_TXD 4 |
| 126 | +#define MI424WR_KSSPI_CLOCK 2 |
| 127 | +#define MI424WR_KSSPI_RXD 3 |
| 128 | + |
| 129 | +/* |
| 130 | + * The "reset" button is wired to GPIO 10. |
| 131 | + * The GPIO is brought "low" when the button is pushed. |
| 132 | + */ |
| 133 | + |
| 134 | +#define MI424WR_BUTTON_GPIO 10 |
| 135 | +#define MI424WR_BUTTON_IRQ IRQ_IXP4XX_GPIO10 |
| 136 | + |
| 137 | +#define MI424WR_MOCA_WAN_LED 11 |
| 138 | + |
| 139 | +/* Latch on CS1 - taken from Actiontec's 2.4 source code |
| 140 | + * |
| 141 | + * default latch value |
| 142 | + * 0 - power alarm led (red) 0 (off) |
| 143 | + * 1 - power led (green) 0 (off) |
| 144 | + * 2 - wireless led (green) 1 (off) |
| 145 | + * 3 - no internet led (red) 0 (off) |
| 146 | + * 4 - internet ok led (green) 0 (off) |
| 147 | + * 5 - moca LAN 0 (off) |
| 148 | + * 6 - WAN alarm led (red) 0 (off) |
| 149 | + * 7 - PCI reset 1 (not reset) |
| 150 | + * 8 - IP phone 1 led (green) 1 (off) |
| 151 | + * 9 - IP phone 2 led (green) 1 (off) |
| 152 | + * 10 - VOIP ready led (green) 1 (off) |
| 153 | + * 11 - PSTN relay 1 control 0 (PSTN) |
| 154 | + * 12 - PSTN relay 1 control 0 (PSTN) |
| 155 | + * 13 - N/A |
| 156 | + * 14 - N/A |
| 157 | + * 15 - N/A |
| 158 | + */ |
| 159 | + |
| 160 | +#define MI424WR_LATCH_MASK 0x04 |
| 161 | +#define MI424WR_LATCH_DEFAULT 0x1f86 |
| 162 | + |
| 163 | +#define MI424WR_LATCH_ALARM_LED 0x00 |
| 164 | +#define MI424WR_LATCH_POWER_LED 0x01 |
| 165 | +#define MI424WR_LATCH_WIRELESS_LED 0x02 |
| 166 | +#define MI424WR_LATCH_INET_DOWN_LED 0x03 |
| 167 | +#define MI424WR_LATCH_INET_OK_LED 0x04 |
| 168 | +#define MI424WR_LATCH_MOCA_LAN_LED 0x05 |
| 169 | +#define MI424WR_LATCH_WAN_ALARM_LED 0x06 |
| 170 | +#define MI424WR_LATCH_PCI_RESET 0x07 |
| 171 | +#define MI424WR_LATCH_PHONE1_LED 0x08 |
| 172 | +#define MI424WR_LATCH_PHONE2_LED 0x09 |
| 173 | +#define MI424WR_LATCH_VOIP_LED 0x10 |
| 174 | +#define MI424WR_LATCH_PSTN_RELAY1 0x11 |
| 175 | +#define MI424WR_LATCH_PSTN_RELAY2 0x12 |
| 176 | + |
| 177 | +/* initialize CS1 to default timings, Intel style, 16-bit bus */ |
| 178 | +#define MI424WR_CS1_CONFIG 0x80000002 |
| 179 | + |
| 180 | +/* Define both UARTs but they are not easily accessible. |
| 181 | + */ |
| 182 | + |
| 183 | +static struct resource mi424wr_uart_resources[] = { |
| 184 | + { |
| 185 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 186 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 187 | + .flags = IORESOURCE_MEM, |
| 188 | + }, |
| 189 | + { |
| 190 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 191 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 192 | + .flags = IORESOURCE_MEM, |
| 193 | + } |
| 194 | +}; |
| 195 | + |
| 196 | + |
| 197 | +static struct plat_serial8250_port mi424wr_uart_platform_data[] = { |
| 198 | + { |
| 199 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 200 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 201 | + .irq = IRQ_IXP4XX_UART1, |
| 202 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 203 | + .iotype = UPIO_MEM, |
| 204 | + .regshift = 2, |
| 205 | + .uartclk = IXP4XX_UART_XTAL, |
| 206 | + }, |
| 207 | + { |
| 208 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 209 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 210 | + .irq = IRQ_IXP4XX_UART2, |
| 211 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 212 | + .iotype = UPIO_MEM, |
| 213 | + .regshift = 2, |
| 214 | + .uartclk = IXP4XX_UART_XTAL, |
| 215 | + }, |
| 216 | + { }, |
| 217 | +}; |
| 218 | + |
| 219 | +static struct platform_device mi424wr_uart_device = { |
| 220 | + .name = "serial8250", |
| 221 | + .id = PLAT8250_DEV_PLATFORM, |
| 222 | + .dev.platform_data = mi424wr_uart_platform_data, |
| 223 | + .num_resources = ARRAY_SIZE(mi424wr_uart_resources), |
| 224 | + .resource = mi424wr_uart_resources, |
| 225 | +}; |
| 226 | + |
| 227 | +static struct flash_platform_data mi424wr_flash_data = { |
| 228 | + .map_name = "cfi_probe", |
| 229 | + .width = 2, |
| 230 | +}; |
| 231 | + |
| 232 | +static struct resource mi424wr_flash_resource = { |
| 233 | + .flags = IORESOURCE_MEM, |
| 234 | +}; |
| 235 | + |
| 236 | +static struct platform_device mi424wr_flash = { |
| 237 | + .name = "IXP4XX-Flash", |
| 238 | + .id = 0, |
| 239 | + .dev.platform_data = &mi424wr_flash_data, |
| 240 | + .num_resources = 1, |
| 241 | + .resource = &mi424wr_flash_resource, |
| 242 | +}; |
| 243 | + |
| 244 | +static int mi424wr_spi_boardinfo_setup(struct spi_board_info *bi, |
| 245 | + struct spi_master *master, void *data) |
| 246 | +{ |
| 247 | + |
| 248 | + strlcpy(bi->modalias, "spi-ks8995", sizeof(bi->modalias)); |
| 249 | + |
| 250 | + bi->max_speed_hz = 5000000 /* Hz */; |
| 251 | + bi->bus_num = master->bus_num; |
| 252 | + bi->mode = SPI_MODE_0; |
| 253 | + |
| 254 | + return 0; |
| 255 | +} |
| 256 | + |
| 257 | +static struct spi_gpio_platform_data mi424wr_spi_bus_data = { |
| 258 | + .pin_cs = MI424WR_KSSPI_SELECT, |
| 259 | + .pin_clk = MI424WR_KSSPI_CLOCK, |
| 260 | + .pin_miso = MI424WR_KSSPI_RXD, |
| 261 | + .pin_mosi = MI424WR_KSSPI_TXD, |
| 262 | + .cs_activelow = 1, |
| 263 | + .no_spi_delay = 1, |
| 264 | + .boardinfo_setup = mi424wr_spi_boardinfo_setup, |
| 265 | +}; |
| 266 | + |
| 267 | +static struct gpio_led mi424wr_gpio_led[] = { |
| 268 | + { |
| 269 | + .name = "moca-wan", /* green led */ |
| 270 | + .gpio = MI424WR_MOCA_WAN_LED, |
| 271 | + .active_low = 0, |
| 272 | + } |
| 273 | +}; |
| 274 | + |
| 275 | +static struct gpio_led_platform_data mi424wr_gpio_leds_data = { |
| 276 | + .num_leds = 1, |
| 277 | + .leds = mi424wr_gpio_led, |
| 278 | +}; |
| 279 | + |
| 280 | +static struct platform_device mi424wr_gpio_leds = { |
| 281 | + .name = "leds-gpio", |
| 282 | + .id = -1, |
| 283 | + .dev.platform_data = &mi424wr_gpio_leds_data, |
| 284 | +}; |
| 285 | + |
| 286 | +static uint16_t latch_value = MI424WR_LATCH_DEFAULT; |
| 287 | +static uint16_t __iomem *iobase; |
| 288 | + |
| 289 | +static void mi424wr_latch_set_led(u8 bit, enum led_brightness value) |
| 290 | +{ |
| 291 | + |
| 292 | + if (((MI424WR_LATCH_MASK >> bit) & 1) ^ (value == LED_OFF)) |
| 293 | + latch_value &= ~(0x1 << bit); |
| 294 | + else |
| 295 | + latch_value |= (0x1 << bit); |
| 296 | + |
| 297 | + __raw_writew(latch_value, iobase); |
| 298 | + |
| 299 | +} |
| 300 | + |
| 301 | +static struct latch_led mi424wr_latch_led[] = { |
| 302 | + { |
| 303 | + .name = "power-alarm", |
| 304 | + .bit = MI424WR_LATCH_ALARM_LED, |
| 305 | + }, |
| 306 | + { |
| 307 | + .name = "power-ok", |
| 308 | + .bit = MI424WR_LATCH_POWER_LED, |
| 309 | + }, |
| 310 | + { |
| 311 | + .name = "wireless", /* green led */ |
| 312 | + .bit = MI424WR_LATCH_WIRELESS_LED, |
| 313 | + }, |
| 314 | + { |
| 315 | + .name = "inet-down", /* red led */ |
| 316 | + .bit = MI424WR_LATCH_INET_DOWN_LED, |
| 317 | + }, |
| 318 | + { |
| 319 | + .name = "inet-up", /* green led */ |
| 320 | + .bit = MI424WR_LATCH_INET_OK_LED, |
| 321 | + }, |
| 322 | + { |
| 323 | + .name = "moca-lan", /* green led */ |
| 324 | + .bit = MI424WR_LATCH_MOCA_LAN_LED, |
| 325 | + }, |
| 326 | + { |
| 327 | + .name = "wan-alarm", /* red led */ |
| 328 | + .bit = MI424WR_LATCH_WAN_ALARM_LED, |
| 329 | + } |
| 330 | +}; |
| 331 | + |
| 332 | +static struct latch_led_platform_data mi424wr_latch_leds_data = { |
| 333 | + .num_leds = ARRAY_SIZE(mi424wr_latch_led), |
| 334 | + .mem = 0x51000000, |
| 335 | + .leds = mi424wr_latch_led, |
| 336 | + .set_led = mi424wr_latch_set_led, |
| 337 | +}; |
| 338 | + |
| 339 | +static struct platform_device mi424wr_latch_leds = { |
| 340 | + .name = "leds-latch", |
| 341 | + .id = -1, |
| 342 | + .dev.platform_data = &mi424wr_latch_leds_data, |
| 343 | +}; |
| 344 | + |
| 345 | +static struct platform_device mi424wr_spi_bus = { |
| 346 | + .name = "spi-gpio", |
| 347 | + .id = 0, |
| 348 | + .dev.platform_data = &mi424wr_spi_bus_data, |
| 349 | +}; |
| 350 | + |
| 351 | +static struct eth_plat_info mi424wr_npeb_data = { |
| 352 | + .phy = 17, /* KS8721 */ |
| 353 | + .rxq = 3, |
| 354 | + .txreadyq = 20, |
| 355 | +}; |
| 356 | + |
| 357 | +static struct eth_plat_info mi424wr_npec_data = { |
| 358 | + .phy = IXP4XX_ETH_PHY_MAX_ADDR, |
| 359 | + .phy_mask = 0x1e, /* ports 1-4 of the KS8995 switch */ |
| 360 | + .rxq = 4, |
| 361 | + .txreadyq = 21, |
| 362 | +}; |
| 363 | + |
| 364 | +static struct platform_device mi424wr_npe_devices[] = { |
| 365 | + { |
| 366 | + .name = "ixp4xx_eth", |
| 367 | + .id = IXP4XX_ETH_NPEC, |
| 368 | + .dev.platform_data = &mi424wr_npec_data, |
| 369 | + }, { |
| 370 | + .name = "ixp4xx_eth", |
| 371 | + .id = IXP4XX_ETH_NPEB, |
| 372 | + .dev.platform_data = &mi424wr_npeb_data, |
| 373 | + } |
| 374 | +}; |
| 375 | + |
| 376 | +static struct platform_device *mi424wr_devices[] __initdata = { |
| 377 | + &mi424wr_uart_device, |
| 378 | + &mi424wr_flash, |
| 379 | + &mi424wr_gpio_leds, |
| 380 | + &mi424wr_latch_leds, |
| 381 | + &mi424wr_spi_bus, |
| 382 | + &mi424wr_npe_devices[0], |
| 383 | + &mi424wr_npe_devices[1], |
| 384 | +}; |
| 385 | + |
| 386 | +static void __init mi424wr_init(void) |
| 387 | +{ |
| 388 | + ixp4xx_sys_init(); |
| 389 | + |
| 390 | + mi424wr_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 391 | + mi424wr_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; |
| 392 | + |
| 393 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 394 | + *IXP4XX_EXP_CS1 = MI424WR_CS1_CONFIG; |
| 395 | + |
| 396 | + /* configure button as input |
| 397 | + */ |
| 398 | + gpio_line_config(MI424WR_BUTTON_GPIO, IXP4XX_GPIO_IN); |
| 399 | + |
| 400 | + /* Initialize LEDs and enables PCI bus. |
| 401 | + */ |
| 402 | + iobase = ioremap_nocache(IXP4XX_EXP_BUS_BASE(1), 0x1000); |
| 403 | + __raw_writew(latch_value, iobase); |
| 404 | + |
| 405 | + platform_add_devices(mi424wr_devices, ARRAY_SIZE(mi424wr_devices)); |
| 406 | +} |
| 407 | + |
| 408 | + |
| 409 | +MACHINE_START(MI424WR, "Actiontec MI424WR") |
| 410 | + /* Maintainer: Jose Vasconcellos */ |
| 411 | + .phys_io = IXP4XX_UART2_BASE_PHYS, |
| 412 | + .io_pg_offst = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc, |
| 413 | + .map_io = ixp4xx_map_io, |
| 414 | + .init_irq = ixp4xx_init_irq, |
| 415 | + .timer = &ixp4xx_timer, |
| 416 | + .boot_params = 0x0100, |
| 417 | + .init_machine = mi424wr_init, |
| 418 | +MACHINE_END |
| 419 | + |
| 420 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 421 | @@ -23,6 +23,7 @@ obj-pci-$(CONFIG_MACH_COMPEX) += ixdp42 |
| 422 | obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o |
| 423 | obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o |
| 424 | obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o |
| 425 | +obj-pci-$(CONFIG_MACH_MI424WR) += mi424wr-pci.o |
| 426 | |
| 427 | obj-y += common.o |
| 428 | |
| 429 | @@ -45,6 +46,7 @@ obj-$(CONFIG_MACH_COMPEX) += compex-setu |
| 430 | obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o |
| 431 | obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o |
| 432 | obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o |
| 433 | +obj-$(CONFIG_MACH_MI424WR) += mi424wr-setup.o |
| 434 | |
| 435 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 436 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 437 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 438 | @@ -235,6 +235,13 @@ config MACH_GTWX5715 |
| 439 | "High Speed" UART is n/c (as far as I can tell) |
| 440 | 20 Pin ARM/Xscale JTAG interface on J2 |
| 441 | |
| 442 | +config MACH_MI424WR |
| 443 | + bool "Actiontec MI424WR" |
| 444 | + depends on ARCH_IXP4XX |
| 445 | + select PCI |
| 446 | + help |
| 447 | + Add support for the Actiontec MI424-WR. |
| 448 | + |
| 449 | comment "IXP4xx Options" |
| 450 | |
| 451 | config IXP4XX_INDIRECT_PCI |
| 452 | --- a/arch/arm/configs/ixp4xx_defconfig |
| 453 | @@ -172,6 +172,7 @@ CONFIG_MACH_FSG=y |
| 454 | CONFIG_CPU_IXP46X=y |
| 455 | CONFIG_CPU_IXP43X=y |
| 456 | CONFIG_MACH_GTWX5715=y |
| 457 | +CONFIG_MACH_MI424WR=y |
| 458 | |
| 459 | # |
| 460 | # IXP4xx Options |
target/linux/ixp4xx/patches-2.6.33/190-cambria_support.patch |
| 1 | --- /dev/null |
| 2 | @@ -0,0 +1,74 @@ |
| 3 | +/* |
| 4 | + * arch/arch/mach-ixp4xx/cambria-pci.c |
| 5 | + * |
| 6 | + * PCI setup routines for Gateworks Cambria series |
| 7 | + * |
| 8 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 9 | + * |
| 10 | + * based on coyote-pci.c: |
| 11 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 12 | + * Copyright (C) 2003 MontaVista Softwrae, Inc. |
| 13 | + * |
| 14 | + * Maintainer: Imre Kaloz <kaloz@openwrt.org> |
| 15 | + * |
| 16 | + * This program is free software; you can redistribute it and/or modify |
| 17 | + * it under the terms of the GNU General Public License version 2 as |
| 18 | + * published by the Free Software Foundation. |
| 19 | + * |
| 20 | + */ |
| 21 | + |
| 22 | +#include <linux/kernel.h> |
| 23 | +#include <linux/pci.h> |
| 24 | +#include <linux/init.h> |
| 25 | +#include <linux/irq.h> |
| 26 | + |
| 27 | +#include <asm/mach-types.h> |
| 28 | +#include <mach/hardware.h> |
| 29 | +#include <asm/irq.h> |
| 30 | + |
| 31 | +#include <asm/mach/pci.h> |
| 32 | + |
| 33 | +extern void ixp4xx_pci_preinit(void); |
| 34 | +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); |
| 35 | +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); |
| 36 | + |
| 37 | +void __init cambria_pci_preinit(void) |
| 38 | +{ |
| 39 | + set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); |
| 40 | + set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); |
| 41 | + set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); |
| 42 | + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); |
| 43 | + |
| 44 | + ixp4xx_pci_preinit(); |
| 45 | +} |
| 46 | + |
| 47 | +static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 48 | +{ |
| 49 | + if (slot == 1) |
| 50 | + return IRQ_IXP4XX_GPIO11; |
| 51 | + else if (slot == 2) |
| 52 | + return IRQ_IXP4XX_GPIO10; |
| 53 | + else if (slot == 3) |
| 54 | + return IRQ_IXP4XX_GPIO9; |
| 55 | + else if (slot == 4) |
| 56 | + return IRQ_IXP4XX_GPIO8; |
| 57 | + else return -1; |
| 58 | +} |
| 59 | + |
| 60 | +struct hw_pci cambria_pci __initdata = { |
| 61 | + .nr_controllers = 1, |
| 62 | + .preinit = cambria_pci_preinit, |
| 63 | + .swizzle = pci_std_swizzle, |
| 64 | + .setup = ixp4xx_setup, |
| 65 | + .scan = ixp4xx_scan_bus, |
| 66 | + .map_irq = cambria_map_irq, |
| 67 | +}; |
| 68 | + |
| 69 | +int __init cambria_pci_init(void) |
| 70 | +{ |
| 71 | + if (machine_is_cambria()) |
| 72 | + pci_common_init(&cambria_pci); |
| 73 | + return 0; |
| 74 | +} |
| 75 | + |
| 76 | +subsys_initcall(cambria_pci_init); |
| 77 | --- /dev/null |
| 78 | @@ -0,0 +1,429 @@ |
| 79 | +/* |
| 80 | + * arch/arm/mach-ixp4xx/cambria-setup.c |
| 81 | + * |
| 82 | + * Board setup for the Gateworks Cambria series |
| 83 | + * |
| 84 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 85 | + * |
| 86 | + * based on coyote-setup.c: |
| 87 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 88 | + * |
| 89 | + * Author: Imre Kaloz <kaloz@openwrt.org> |
| 90 | + */ |
| 91 | + |
| 92 | +#include <linux/device.h> |
| 93 | +#include <linux/i2c.h> |
| 94 | +#include <linux/i2c-gpio.h> |
| 95 | +#include <linux/i2c/at24.h> |
| 96 | +#include <linux/if_ether.h> |
| 97 | +#include <linux/init.h> |
| 98 | +#include <linux/kernel.h> |
| 99 | +#include <linux/leds.h> |
| 100 | +#include <linux/memory.h> |
| 101 | +#include <linux/netdevice.h> |
| 102 | +#include <linux/serial.h> |
| 103 | +#include <linux/serial_8250.h> |
| 104 | +#include <linux/slab.h> |
| 105 | +#include <linux/socket.h> |
| 106 | +#include <linux/types.h> |
| 107 | +#include <linux/tty.h> |
| 108 | + |
| 109 | +#include <mach/hardware.h> |
| 110 | +#include <asm/irq.h> |
| 111 | +#include <asm/mach-types.h> |
| 112 | +#include <asm/mach/arch.h> |
| 113 | +#include <asm/mach/flash.h> |
| 114 | +#include <asm/setup.h> |
| 115 | + |
| 116 | +struct cambria_board_info { |
| 117 | + unsigned char *model; |
| 118 | + void (*setup)(void); |
| 119 | +}; |
| 120 | + |
| 121 | +static struct cambria_board_info *cambria_info __initdata; |
| 122 | + |
| 123 | +static struct flash_platform_data cambria_flash_data = { |
| 124 | + .map_name = "cfi_probe", |
| 125 | + .width = 2, |
| 126 | +}; |
| 127 | + |
| 128 | +static struct resource cambria_flash_resource = { |
| 129 | + .flags = IORESOURCE_MEM, |
| 130 | +}; |
| 131 | + |
| 132 | +static struct platform_device cambria_flash = { |
| 133 | + .name = "IXP4XX-Flash", |
| 134 | + .id = 0, |
| 135 | + .dev = { |
| 136 | + .platform_data = &cambria_flash_data, |
| 137 | + }, |
| 138 | + .num_resources = 1, |
| 139 | + .resource = &cambria_flash_resource, |
| 140 | +}; |
| 141 | + |
| 142 | +static struct i2c_gpio_platform_data cambria_i2c_gpio_data = { |
| 143 | + .sda_pin = 7, |
| 144 | + .scl_pin = 6, |
| 145 | +}; |
| 146 | + |
| 147 | +static struct platform_device cambria_i2c_gpio = { |
| 148 | + .name = "i2c-gpio", |
| 149 | + .id = 0, |
| 150 | + .dev = { |
| 151 | + .platform_data = &cambria_i2c_gpio_data, |
| 152 | + }, |
| 153 | +}; |
| 154 | + |
| 155 | +static struct eth_plat_info cambria_npec_data = { |
| 156 | + .phy = 1, |
| 157 | + .rxq = 4, |
| 158 | + .txreadyq = 21, |
| 159 | +}; |
| 160 | + |
| 161 | +static struct eth_plat_info cambria_npea_data = { |
| 162 | + .phy = 2, |
| 163 | + .rxq = 2, |
| 164 | + .txreadyq = 19, |
| 165 | +}; |
| 166 | + |
| 167 | +static struct platform_device cambria_npec_device = { |
| 168 | + .name = "ixp4xx_eth", |
| 169 | + .id = IXP4XX_ETH_NPEC, |
| 170 | + .dev.platform_data = &cambria_npec_data, |
| 171 | +}; |
| 172 | + |
| 173 | +static struct platform_device cambria_npea_device = { |
| 174 | + .name = "ixp4xx_eth", |
| 175 | + .id = IXP4XX_ETH_NPEA, |
| 176 | + .dev.platform_data = &cambria_npea_data, |
| 177 | +}; |
| 178 | + |
| 179 | +static struct resource cambria_uart_resource = { |
| 180 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 181 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 182 | + .flags = IORESOURCE_MEM, |
| 183 | +}; |
| 184 | + |
| 185 | +static struct plat_serial8250_port cambria_uart_data[] = { |
| 186 | + { |
| 187 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 188 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 189 | + .irq = IRQ_IXP4XX_UART1, |
| 190 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 191 | + .iotype = UPIO_MEM, |
| 192 | + .regshift = 2, |
| 193 | + .uartclk = IXP4XX_UART_XTAL, |
| 194 | + }, |
| 195 | + { }, |
| 196 | +}; |
| 197 | + |
| 198 | +static struct platform_device cambria_uart = { |
| 199 | + .name = "serial8250", |
| 200 | + .id = PLAT8250_DEV_PLATFORM, |
| 201 | + .dev = { |
| 202 | + .platform_data = cambria_uart_data, |
| 203 | + }, |
| 204 | + .num_resources = 1, |
| 205 | + .resource = &cambria_uart_resource, |
| 206 | +}; |
| 207 | + |
| 208 | +static struct resource cambria_pata_resources[] = { |
| 209 | + { |
| 210 | + .flags = IORESOURCE_MEM |
| 211 | + }, |
| 212 | + { |
| 213 | + .flags = IORESOURCE_MEM, |
| 214 | + }, |
| 215 | + { |
| 216 | + .name = "intrq", |
| 217 | + .start = IRQ_IXP4XX_GPIO12, |
| 218 | + .end = IRQ_IXP4XX_GPIO12, |
| 219 | + .flags = IORESOURCE_IRQ, |
| 220 | + }, |
| 221 | +}; |
| 222 | + |
| 223 | +static struct ixp4xx_pata_data cambria_pata_data = { |
| 224 | + .cs0_bits = 0xbfff3c03, |
| 225 | + .cs1_bits = 0xbfff3c03, |
| 226 | +}; |
| 227 | + |
| 228 | +static struct platform_device cambria_pata = { |
| 229 | + .name = "pata_ixp4xx_cf", |
| 230 | + .id = 0, |
| 231 | + .dev.platform_data = &cambria_pata_data, |
| 232 | + .num_resources = ARRAY_SIZE(cambria_pata_resources), |
| 233 | + .resource = cambria_pata_resources, |
| 234 | +}; |
| 235 | + |
| 236 | +static struct gpio_led cambria_gpio_leds[] = { |
| 237 | + { |
| 238 | + .name = "user", /* green led */ |
| 239 | + .gpio = 5, |
| 240 | + .active_low = 1, |
| 241 | + } |
| 242 | +}; |
| 243 | + |
| 244 | +static struct gpio_led_platform_data cambria_gpio_leds_data = { |
| 245 | + .num_leds = 1, |
| 246 | + .leds = cambria_gpio_leds, |
| 247 | +}; |
| 248 | + |
| 249 | +static struct platform_device cambria_gpio_leds_device = { |
| 250 | + .name = "leds-gpio", |
| 251 | + .id = -1, |
| 252 | + .dev.platform_data = &cambria_gpio_leds_data, |
| 253 | +}; |
| 254 | + |
| 255 | +static struct latch_led cambria_latch_leds[] = { |
| 256 | + { |
| 257 | + .name = "ledA", /* green led */ |
| 258 | + .bit = 0, |
| 259 | + }, |
| 260 | + { |
| 261 | + .name = "ledB", /* green led */ |
| 262 | + .bit = 1, |
| 263 | + }, |
| 264 | + { |
| 265 | + .name = "ledC", /* green led */ |
| 266 | + .bit = 2, |
| 267 | + }, |
| 268 | + { |
| 269 | + .name = "ledD", /* green led */ |
| 270 | + .bit = 3, |
| 271 | + }, |
| 272 | + { |
| 273 | + .name = "ledE", /* green led */ |
| 274 | + .bit = 4, |
| 275 | + }, |
| 276 | + { |
| 277 | + .name = "ledF", /* green led */ |
| 278 | + .bit = 5, |
| 279 | + }, |
| 280 | + { |
| 281 | + .name = "ledG", /* green led */ |
| 282 | + .bit = 6, |
| 283 | + }, |
| 284 | + { |
| 285 | + .name = "ledH", /* green led */ |
| 286 | + .bit = 7, |
| 287 | + } |
| 288 | +}; |
| 289 | + |
| 290 | +static struct latch_led_platform_data cambria_latch_leds_data = { |
| 291 | + .num_leds = 8, |
| 292 | + .leds = cambria_latch_leds, |
| 293 | + .mem = 0x53F40000, |
| 294 | +}; |
| 295 | + |
| 296 | +static struct platform_device cambria_latch_leds_device = { |
| 297 | + .name = "leds-latch", |
| 298 | + .id = -1, |
| 299 | + .dev.platform_data = &cambria_latch_leds_data, |
| 300 | +}; |
| 301 | + |
| 302 | +static struct resource cambria_usb0_resources[] = { |
| 303 | + { |
| 304 | + .start = 0xCD000000, |
| 305 | + .end = 0xCD000300, |
| 306 | + .flags = IORESOURCE_MEM, |
| 307 | + }, |
| 308 | + { |
| 309 | + .start = 32, |
| 310 | + .flags = IORESOURCE_IRQ, |
| 311 | + }, |
| 312 | +}; |
| 313 | + |
| 314 | +static struct resource cambria_usb1_resources[] = { |
| 315 | + { |
| 316 | + .start = 0xCE000000, |
| 317 | + .end = 0xCE000300, |
| 318 | + .flags = IORESOURCE_MEM, |
| 319 | + }, |
| 320 | + { |
| 321 | + .start = 33, |
| 322 | + .flags = IORESOURCE_IRQ, |
| 323 | + }, |
| 324 | +}; |
| 325 | + |
| 326 | +static u64 ehci_dma_mask = ~(u32)0; |
| 327 | + |
| 328 | +static struct platform_device cambria_usb0_device = { |
| 329 | + .name = "ixp4xx-ehci", |
| 330 | + .id = 0, |
| 331 | + .resource = cambria_usb0_resources, |
| 332 | + .num_resources = ARRAY_SIZE(cambria_usb0_resources), |
| 333 | + .dev = { |
| 334 | + .dma_mask = &ehci_dma_mask, |
| 335 | + .coherent_dma_mask = 0xffffffff, |
| 336 | + }, |
| 337 | +}; |
| 338 | + |
| 339 | +static struct platform_device cambria_usb1_device = { |
| 340 | + .name = "ixp4xx-ehci", |
| 341 | + .id = 1, |
| 342 | + .resource = cambria_usb1_resources, |
| 343 | + .num_resources = ARRAY_SIZE(cambria_usb1_resources), |
| 344 | + .dev = { |
| 345 | + .dma_mask = &ehci_dma_mask, |
| 346 | + .coherent_dma_mask = 0xffffffff, |
| 347 | + }, |
| 348 | +}; |
| 349 | + |
| 350 | +static struct platform_device *cambria_devices[] __initdata = { |
| 351 | + &cambria_i2c_gpio, |
| 352 | + &cambria_flash, |
| 353 | + &cambria_uart, |
| 354 | +}; |
| 355 | + |
| 356 | +static void __init cambria_gw23xx_setup(void) |
| 357 | +{ |
| 358 | + platform_device_register(&cambria_npec_device); |
| 359 | + platform_device_register(&cambria_npea_device); |
| 360 | +} |
| 361 | + |
| 362 | +static void __init cambria_gw2350_setup(void) |
| 363 | +{ |
| 364 | + platform_device_register(&cambria_npec_device); |
| 365 | + platform_device_register(&cambria_npea_device); |
| 366 | + |
| 367 | + platform_device_register(&cambria_usb0_device); |
| 368 | + platform_device_register(&cambria_usb1_device); |
| 369 | + |
| 370 | + platform_device_register(&cambria_gpio_leds_device); |
| 371 | +} |
| 372 | + |
| 373 | +static void __init cambria_gw2358_setup(void) |
| 374 | +{ |
| 375 | + platform_device_register(&cambria_npec_device); |
| 376 | + platform_device_register(&cambria_npea_device); |
| 377 | + |
| 378 | + platform_device_register(&cambria_usb0_device); |
| 379 | + platform_device_register(&cambria_usb1_device); |
| 380 | + |
| 381 | + platform_device_register(&cambria_pata); |
| 382 | + |
| 383 | + platform_device_register(&cambria_latch_leds_device); |
| 384 | +} |
| 385 | + |
| 386 | +static struct cambria_board_info cambria_boards[] __initdata = { |
| 387 | + { |
| 388 | + .model = "GW2350", |
| 389 | + .setup = cambria_gw2350_setup, |
| 390 | + }, { |
| 391 | + .model = "GW2358", |
| 392 | + .setup = cambria_gw2358_setup, |
| 393 | + } |
| 394 | +}; |
| 395 | + |
| 396 | +static struct cambria_board_info * __init cambria_find_board_info(char *model) |
| 397 | +{ |
| 398 | + int i; |
| 399 | + model[6] = '\0'; |
| 400 | + |
| 401 | + for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) { |
| 402 | + struct cambria_board_info *info = &cambria_boards[i]; |
| 403 | + if (strcmp(info->model, model) == 0) |
| 404 | + return info; |
| 405 | + } |
| 406 | + |
| 407 | + return NULL; |
| 408 | +} |
| 409 | + |
| 410 | +static struct memory_accessor *at24_mem_acc; |
| 411 | + |
| 412 | +static void at24_setup(struct memory_accessor *mem_acc, void *context) |
| 413 | +{ |
| 414 | + char mac_addr[ETH_ALEN]; |
| 415 | + char model[7]; |
| 416 | + |
| 417 | + at24_mem_acc = mem_acc; |
| 418 | + |
| 419 | + /* Read MAC addresses */ |
| 420 | + if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x0, 6) == 6) { |
| 421 | + memcpy(&cambria_npec_data.hwaddr, mac_addr, ETH_ALEN); |
| 422 | + } |
| 423 | + if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x6, 6) == 6) { |
| 424 | + memcpy(&cambria_npea_data.hwaddr, mac_addr, ETH_ALEN); |
| 425 | + } |
| 426 | + |
| 427 | + /* Read the first 6 bytes of the model number */ |
| 428 | + if (at24_mem_acc->read(at24_mem_acc, model, 0x20, 6) == 6) { |
| 429 | + cambria_info = cambria_find_board_info(model); |
| 430 | + } |
| 431 | + |
| 432 | +} |
| 433 | + |
| 434 | +static struct at24_platform_data cambria_eeprom_info = { |
| 435 | + .byte_len = 1024, |
| 436 | + .page_size = 16, |
| 437 | + .flags = AT24_FLAG_READONLY, |
| 438 | + .setup = at24_setup, |
| 439 | +}; |
| 440 | + |
| 441 | +static struct i2c_board_info __initdata cambria_i2c_board_info[] = { |
| 442 | + { |
| 443 | + I2C_BOARD_INFO("ds1672", 0x68), |
| 444 | + }, |
| 445 | + { |
| 446 | + I2C_BOARD_INFO("ad7418", 0x28), |
| 447 | + }, |
| 448 | + { |
| 449 | + I2C_BOARD_INFO("24c08", 0x51), |
| 450 | + .platform_data = &cambria_eeprom_info |
| 451 | + }, |
| 452 | +}; |
| 453 | + |
| 454 | +static void __init cambria_init(void) |
| 455 | +{ |
| 456 | + ixp4xx_sys_init(); |
| 457 | + |
| 458 | + cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 459 | + cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 460 | + |
| 461 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 462 | + *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 463 | + |
| 464 | + platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices)); |
| 465 | + |
| 466 | + cambria_pata_resources[0].start = 0x53e00000; |
| 467 | + cambria_pata_resources[0].end = 0x53e3ffff; |
| 468 | + |
| 469 | + cambria_pata_resources[1].start = 0x53e40000; |
| 470 | + cambria_pata_resources[1].end = 0x53e7ffff; |
| 471 | + |
| 472 | + cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3; |
| 473 | + cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3; |
| 474 | + |
| 475 | + i2c_register_board_info(0, cambria_i2c_board_info, |
| 476 | + ARRAY_SIZE(cambria_i2c_board_info)); |
| 477 | +} |
| 478 | + |
| 479 | +static int __init cambria_model_setup(void) |
| 480 | +{ |
| 481 | + if (!machine_is_cambria()) |
| 482 | + return 0; |
| 483 | + |
| 484 | + if (cambria_info) { |
| 485 | + printk(KERN_DEBUG "Running on Gateworks Cambria %s\n", |
| 486 | + cambria_info->model); |
| 487 | + cambria_info->setup(); |
| 488 | + } else { |
| 489 | + printk(KERN_INFO "Unknown/missing Cambria model number" |
| 490 | + " -- defaults will be used\n"); |
| 491 | + cambria_gw23xx_setup(); |
| 492 | + } |
| 493 | + |
| 494 | + return 0; |
| 495 | +} |
| 496 | +late_initcall(cambria_model_setup); |
| 497 | + |
| 498 | +MACHINE_START(CAMBRIA, "Gateworks Cambria series") |
| 499 | + /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ |
| 500 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 501 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 502 | + .map_io = ixp4xx_map_io, |
| 503 | + .init_irq = ixp4xx_init_irq, |
| 504 | + .timer = &ixp4xx_timer, |
| 505 | + .boot_params = 0x0100, |
| 506 | + .init_machine = cambria_init, |
| 507 | +MACHINE_END |
| 508 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 509 | @@ -25,6 +25,14 @@ config MACH_AVILA |
| 510 | Avila Network Platform. For more information on this platform, |
| 511 | see <file:Documentation/arm/IXP4xx>. |
| 512 | |
| 513 | +config MACH_CAMBRIA |
| 514 | + bool "Cambria" |
| 515 | + select PCI |
| 516 | + help |
| 517 | + Say 'Y' here if you want your kernel to support the Gateworks |
| 518 | + Cambria series. For more information on this platform, |
| 519 | + see <file:Documentation/arm/IXP4xx>. |
| 520 | + |
| 521 | config MACH_LOFT |
| 522 | bool "Loft" |
| 523 | depends on MACH_AVILA |
| 524 | @@ -214,7 +222,7 @@ config CPU_IXP46X |
| 525 | |
| 526 | config CPU_IXP43X |
| 527 | bool |
| 528 | - depends on MACH_KIXRP435 |
| 529 | + depends on MACH_KIXRP435 || MACH_CAMBRIA |
| 530 | default y |
| 531 | |
| 532 | config MACH_GTWX5715 |
| 533 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 534 | @@ -7,6 +7,7 @@ obj-pci-n := |
| 535 | |
| 536 | obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o |
| 537 | obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o |
| 538 | +obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o |
| 539 | obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o |
| 540 | obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o |
| 541 | obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o |
| 542 | @@ -29,6 +30,7 @@ obj-y += common.o |
| 543 | |
| 544 | obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o |
| 545 | obj-$(CONFIG_MACH_AVILA) += avila-setup.o |
| 546 | +obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o |
| 547 | obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o |
| 548 | obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o |
| 549 | obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o |
target/linux/ixp4xx/patches-2.6.33/191-cambria_optional_uart.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/cambria-setup.c |
| 2 | @@ -34,6 +34,7 @@ |
| 3 | #include <asm/mach/arch.h> |
| 4 | #include <asm/mach/flash.h> |
| 5 | #include <asm/setup.h> |
| 6 | +#include <linux/irq.h> |
| 7 | |
| 8 | struct cambria_board_info { |
| 9 | unsigned char *model; |
| 10 | @@ -127,6 +128,45 @@ static struct platform_device cambria_ua |
| 11 | .resource = &cambria_uart_resource, |
| 12 | }; |
| 13 | |
| 14 | +static struct resource cambria_optional_uart_resources[] = { |
| 15 | + { |
| 16 | + .start = 0x52000000, |
| 17 | + .end = 0x52000fff, |
| 18 | + .flags = IORESOURCE_MEM |
| 19 | + }, |
| 20 | + { |
| 21 | + .start = 0x53000000, |
| 22 | + .end = 0x53000fff, |
| 23 | + .flags = IORESOURCE_MEM |
| 24 | + } |
| 25 | +}; |
| 26 | + |
| 27 | +static struct plat_serial8250_port cambria_optional_uart_data[] = { |
| 28 | + { |
| 29 | + .flags = UPF_BOOT_AUTOCONF, |
| 30 | + .iotype = UPIO_MEM_DELAY, |
| 31 | + .regshift = 0, |
| 32 | + .uartclk = 1843200, |
| 33 | + .rw_delay = 2, |
| 34 | + }, |
| 35 | + { |
| 36 | + .flags = UPF_BOOT_AUTOCONF, |
| 37 | + .iotype = UPIO_MEM_DELAY, |
| 38 | + .regshift = 0, |
| 39 | + .uartclk = 1843200, |
| 40 | + .rw_delay = 2, |
| 41 | + }, |
| 42 | + { }, |
| 43 | +}; |
| 44 | + |
| 45 | +static struct platform_device cambria_optional_uart = { |
| 46 | + .name = "serial8250", |
| 47 | + .id = PLAT8250_DEV_PLATFORM1, |
| 48 | + .dev.platform_data = cambria_optional_uart_data, |
| 49 | + .num_resources = 2, |
| 50 | + .resource = cambria_optional_uart_resources, |
| 51 | +}; |
| 52 | + |
| 53 | static struct resource cambria_pata_resources[] = { |
| 54 | { |
| 55 | .flags = IORESOURCE_MEM |
| 56 | @@ -283,6 +323,19 @@ static void __init cambria_gw23xx_setup( |
| 57 | |
| 58 | static void __init cambria_gw2350_setup(void) |
| 59 | { |
| 60 | + *IXP4XX_EXP_CS2 = 0xBFFF3C43; |
| 61 | + set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); |
| 62 | + cambria_optional_uart_data[0].mapbase = 0x52FF0000; |
| 63 | + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52FF0000, 0x0fff); |
| 64 | + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3; |
| 65 | + |
| 66 | + *IXP4XX_EXP_CS3 = 0xBFFF3C43; |
| 67 | + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING); |
| 68 | + cambria_optional_uart_data[1].mapbase = 0x53FF0000; |
| 69 | + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53FF0000, 0x0fff); |
| 70 | + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4; |
| 71 | + |
| 72 | + platform_device_register(&cambria_optional_uart); |
| 73 | platform_device_register(&cambria_npec_device); |
| 74 | platform_device_register(&cambria_npea_device); |
| 75 | |
| 76 | @@ -294,6 +347,19 @@ static void __init cambria_gw2350_setup( |
| 77 | |
| 78 | static void __init cambria_gw2358_setup(void) |
| 79 | { |
| 80 | + *IXP4XX_EXP_CS3 = 0xBFFF3C43; |
| 81 | + set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); |
| 82 | + cambria_optional_uart_data[0].mapbase = 0x53FC0000; |
| 83 | + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff); |
| 84 | + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3; |
| 85 | + |
| 86 | + set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING); |
| 87 | + cambria_optional_uart_data[1].mapbase = 0x53F80000; |
| 88 | + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff); |
| 89 | + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4; |
| 90 | + |
| 91 | + platform_device_register(&cambria_optional_uart); |
| 92 | + |
| 93 | platform_device_register(&cambria_npec_device); |
| 94 | platform_device_register(&cambria_npea_device); |
| 95 | |
| 96 | --- a/include/linux/serial_8250.h |
| 97 | @@ -27,6 +27,7 @@ struct plat_serial8250_port { |
| 98 | void *private_data; |
| 99 | unsigned char regshift; /* register shift */ |
| 100 | unsigned char iotype; /* UPIO_* */ |
| 101 | + unsigned int rw_delay; /* udelay for slower busses IXP4XX Expansion Bus */ |
| 102 | unsigned char hub6; |
| 103 | upf_t flags; /* UPF_* flags */ |
| 104 | unsigned int type; /* If UPF_FIXED_TYPE */ |
| 105 | --- a/include/linux/serial_core.h |
| 106 | @@ -288,6 +288,7 @@ struct uart_port { |
| 107 | #define UPIO_TSI (5) /* Tsi108/109 type IO */ |
| 108 | #define UPIO_DWAPB (6) /* DesignWare APB UART */ |
| 109 | #define UPIO_RM9000 (7) /* RM9000 type IO */ |
| 110 | +#define UPIO_MEM_DELAY (8) |
| 111 | |
| 112 | unsigned int read_status_mask; /* driver specific */ |
| 113 | unsigned int ignore_status_mask; /* driver specific */ |
| 114 | @@ -330,6 +331,7 @@ struct uart_port { |
| 115 | |
| 116 | unsigned int mctrl; /* current modem ctrl settings */ |
| 117 | unsigned int timeout; /* character-based timeout */ |
| 118 | + unsigned int rw_delay; /* udelay for slow busses, IXP4XX Expansion Bus */ |
| 119 | unsigned int type; /* port type */ |
| 120 | const struct uart_ops *ops; |
| 121 | unsigned int custom_divisor; |
| 122 | --- a/drivers/serial/8250.c |
| 123 | @@ -409,6 +409,20 @@ static void mem_serial_out(struct uart_p |
| 124 | writeb(value, p->membase + offset); |
| 125 | } |
| 126 | |
| 127 | +static unsigned int memdelay_serial_in(struct uart_port *p, int offset) |
| 128 | +{ |
| 129 | + struct uart_8250_port *up = (struct uart_8250_port *)p; |
| 130 | + udelay(up->port.rw_delay); |
| 131 | + return mem_serial_in(p, offset); |
| 132 | +} |
| 133 | + |
| 134 | +static void memdelay_serial_out(struct uart_port *p, int offset, int value) |
| 135 | +{ |
| 136 | + struct uart_8250_port *up = (struct uart_8250_port *)p; |
| 137 | + udelay(up->port.rw_delay); |
| 138 | + mem_serial_out(p, offset, value); |
| 139 | +} |
| 140 | + |
| 141 | static void mem32_serial_out(struct uart_port *p, int offset, int value) |
| 142 | { |
| 143 | offset = map_8250_out_reg(p, offset) << p->regshift; |
| 144 | @@ -502,6 +516,11 @@ static void set_io_from_upio(struct uart |
| 145 | p->serial_out = mem32_serial_out; |
| 146 | break; |
| 147 | |
| 148 | + case UPIO_MEM_DELAY: |
| 149 | + p->serial_in = memdelay_serial_in; |
| 150 | + p->serial_out = memdelay_serial_out; |
| 151 | + break; |
| 152 | + |
| 153 | #ifdef CONFIG_SERIAL_8250_AU1X00 |
| 154 | case UPIO_AU: |
| 155 | p->serial_in = au_serial_in; |
| 156 | @@ -534,6 +553,7 @@ serial_out_sync(struct uart_8250_port *u |
| 157 | switch (p->iotype) { |
| 158 | case UPIO_MEM: |
| 159 | case UPIO_MEM32: |
| 160 | + case UPIO_MEM_DELAY: |
| 161 | #ifdef CONFIG_SERIAL_8250_AU1X00 |
| 162 | case UPIO_AU: |
| 163 | #endif |
| 164 | @@ -2450,6 +2470,7 @@ static int serial8250_request_std_resour |
| 165 | case UPIO_MEM32: |
| 166 | case UPIO_MEM: |
| 167 | case UPIO_DWAPB: |
| 168 | + case UPIO_MEM_DELAY: |
| 169 | if (!up->port.mapbase) |
| 170 | break; |
| 171 | |
| 172 | @@ -2487,6 +2508,7 @@ static void serial8250_release_std_resou |
| 173 | case UPIO_MEM32: |
| 174 | case UPIO_MEM: |
| 175 | case UPIO_DWAPB: |
| 176 | + case UPIO_MEM_DELAY: |
| 177 | if (!up->port.mapbase) |
| 178 | break; |
| 179 | |
| 180 | @@ -2964,6 +2986,7 @@ static int __devinit serial8250_probe(st |
| 181 | port.serial_in = p->serial_in; |
| 182 | port.serial_out = p->serial_out; |
| 183 | port.dev = &dev->dev; |
| 184 | + port.rw_delay = p->rw_delay; |
| 185 | port.irqflags |= irqflag; |
| 186 | ret = serial8250_register_port(&port); |
| 187 | if (ret < 0) { |
| 188 | @@ -3113,6 +3136,7 @@ int serial8250_register_port(struct uart |
| 189 | uart->port.iotype = port->iotype; |
| 190 | uart->port.flags = port->flags | UPF_BOOT_AUTOCONF; |
| 191 | uart->port.mapbase = port->mapbase; |
| 192 | + uart->port.rw_delay = port->rw_delay; |
| 193 | uart->port.private_data = port->private_data; |
| 194 | if (port->dev) |
| 195 | uart->port.dev = port->dev; |
| 196 | --- a/drivers/serial/serial_core.c |
| 197 | @@ -2144,6 +2144,7 @@ uart_report_port(struct uart_driver *drv |
| 198 | snprintf(address, sizeof(address), |
| 199 | "I/O 0x%lx offset 0x%x", port->iobase, port->hub6); |
| 200 | break; |
| 201 | + case UPIO_MEM_DELAY: |
| 202 | case UPIO_MEM: |
| 203 | case UPIO_MEM32: |
| 204 | case UPIO_AU: |
| 205 | @@ -2557,6 +2558,7 @@ int uart_match_port(struct uart_port *po |
| 206 | case UPIO_HUB6: |
| 207 | return (port1->iobase == port2->iobase) && |
| 208 | (port1->hub6 == port2->hub6); |
| 209 | + case UPIO_MEM_DELAY: |
| 210 | case UPIO_MEM: |
| 211 | case UPIO_MEM32: |
| 212 | case UPIO_AU: |
target/linux/ixp4xx/patches-2.6.33/193-cambria_pld_gpio.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/cambria-setup.c |
| 2 | @@ -12,11 +12,14 @@ |
| 3 | */ |
| 4 | |
| 5 | #include <linux/device.h> |
| 6 | +#include <linux/gpio_buttons.h> |
| 7 | #include <linux/i2c.h> |
| 8 | #include <linux/i2c-gpio.h> |
| 9 | #include <linux/i2c/at24.h> |
| 10 | +#include <linux/i2c/gw_i2c_pld.h> |
| 11 | #include <linux/if_ether.h> |
| 12 | #include <linux/init.h> |
| 13 | +#include <linux/input.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/leds.h> |
| 16 | #include <linux/memory.h> |
| 17 | @@ -323,6 +326,39 @@ static struct platform_device cambria_us |
| 18 | }, |
| 19 | }; |
| 20 | |
| 21 | +static struct gw_i2c_pld_platform_data gw_i2c_pld_data0 = { |
| 22 | + .gpio_base = 16, |
| 23 | + .nr_gpio = 8, |
| 24 | +}; |
| 25 | + |
| 26 | +static struct gw_i2c_pld_platform_data gw_i2c_pld_data1 = { |
| 27 | + .gpio_base = 24, |
| 28 | + .nr_gpio = 2, |
| 29 | +}; |
| 30 | + |
| 31 | + |
| 32 | +static struct gpio_button cambria_gpio_buttons[] = { |
| 33 | + { |
| 34 | + .desc = "user", |
| 35 | + .type = EV_KEY, |
| 36 | + .code = BTN_0, |
| 37 | + .threshold = 2, |
| 38 | + .gpio = 25, |
| 39 | + } |
| 40 | +}; |
| 41 | + |
| 42 | +static struct gpio_buttons_platform_data cambria_gpio_buttons_data = { |
| 43 | + .poll_interval = 500, |
| 44 | + .nbuttons = 1, |
| 45 | + .buttons = cambria_gpio_buttons, |
| 46 | +}; |
| 47 | + |
| 48 | +static struct platform_device cambria_gpio_buttons_device = { |
| 49 | + .name = "gpio-buttons", |
| 50 | + .id = -1, |
| 51 | + .dev.platform_data = &cambria_gpio_buttons_data, |
| 52 | +}; |
| 53 | + |
| 54 | static struct platform_device *cambria_devices[] __initdata = { |
| 55 | &cambria_i2c_gpio, |
| 56 | &cambria_flash, |
| 57 | @@ -331,6 +367,11 @@ static struct platform_device *cambria_d |
| 58 | |
| 59 | static void __init cambria_gw23xx_setup(void) |
| 60 | { |
| 61 | + cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\ |
| 62 | + (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12); |
| 63 | + cambria_gpio_resources[0].end = cambria_gpio_resources[0].start; |
| 64 | + |
| 65 | + platform_device_register(&cambria_gpio); |
| 66 | platform_device_register(&cambria_npec_device); |
| 67 | platform_device_register(&cambria_npea_device); |
| 68 | } |
| 69 | @@ -377,7 +418,8 @@ static void __init cambria_gw2358_setup( |
| 70 | cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff); |
| 71 | cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4; |
| 72 | |
| 73 | - cambria_gpio_resources[0].start = (1 << 14); |
| 74 | + cambria_gpio_resources[0].start = (1 << 14) | (1 << 16) | (1 << 17) | (1 << 18) |\ |
| 75 | + (1 << 19) | (1 << 20) | (1 << 24) | (1 << 25); |
| 76 | cambria_gpio_resources[0].end = cambria_gpio_resources[0].start; |
| 77 | |
| 78 | platform_device_register(&cambria_gpio); |
| 79 | @@ -391,7 +433,12 @@ static void __init cambria_gw2358_setup( |
| 80 | |
| 81 | platform_device_register(&cambria_pata); |
| 82 | |
| 83 | + cambria_gpio_leds[0].gpio = 24; |
| 84 | + platform_device_register(&cambria_gpio_leds_device); |
| 85 | + |
| 86 | platform_device_register(&cambria_latch_leds_device); |
| 87 | + |
| 88 | + platform_device_register(&cambria_gpio_buttons_device); |
| 89 | } |
| 90 | |
| 91 | static struct cambria_board_info cambria_boards[] __initdata = { |
| 92 | @@ -460,6 +507,14 @@ static struct i2c_board_info __initdata |
| 93 | I2C_BOARD_INFO("24c08", 0x51), |
| 94 | .platform_data = &cambria_eeprom_info |
| 95 | }, |
| 96 | + { |
| 97 | + I2C_BOARD_INFO("gw_i2c_pld", 0x56), |
| 98 | + .platform_data = &gw_i2c_pld_data0, |
| 99 | + }, |
| 100 | + { |
| 101 | + I2C_BOARD_INFO("gw_i2c_pld", 0x57), |
| 102 | + .platform_data = &gw_i2c_pld_data1, |
| 103 | + }, |
| 104 | }; |
| 105 | |
| 106 | static void __init cambria_init(void) |
target/linux/ixp4xx/patches-2.6.33/205-npe_driver_separate_phy_functions.patch |
| 1 | --- a/drivers/net/arm/ixp4xx_eth.c |
| 2 | @@ -396,6 +396,50 @@ static void ixp4xx_adjust_link(struct ne |
| 3 | dev->name, port->speed, port->duplex ? "full" : "half"); |
| 4 | } |
| 5 | |
| 6 | +static int ixp4xx_phy_connect(struct net_device *dev) |
| 7 | +{ |
| 8 | + struct port *port = netdev_priv(dev); |
| 9 | + struct eth_plat_info *plat = port->plat; |
| 10 | + char phy_id[MII_BUS_ID_SIZE + 3]; |
| 11 | + |
| 12 | + snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy); |
| 13 | + port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0, |
| 14 | + PHY_INTERFACE_MODE_MII); |
| 15 | + if (IS_ERR(port->phydev)) { |
| 16 | + printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); |
| 17 | + return PTR_ERR(port->phydev); |
| 18 | + } |
| 19 | + |
| 20 | + /* mask with MAC supported features */ |
| 21 | + port->phydev->supported &= PHY_BASIC_FEATURES; |
| 22 | + port->phydev->advertising = port->phydev->supported; |
| 23 | + |
| 24 | + port->phydev->irq = PHY_POLL; |
| 25 | + |
| 26 | + return 0; |
| 27 | +} |
| 28 | + |
| 29 | +static void ixp4xx_phy_disconnect(struct net_device *dev) |
| 30 | +{ |
| 31 | + struct port *port = netdev_priv(dev); |
| 32 | + |
| 33 | + phy_disconnect(port->phydev); |
| 34 | +} |
| 35 | + |
| 36 | +static void ixp4xx_phy_start(struct net_device *dev) |
| 37 | +{ |
| 38 | + struct port *port = netdev_priv(dev); |
| 39 | + |
| 40 | + port->speed = 0; /* force "link up" message */ |
| 41 | + phy_start(port->phydev); |
| 42 | +} |
| 43 | + |
| 44 | +static void ixp4xx_phy_stop(struct net_device *dev) |
| 45 | +{ |
| 46 | + struct port *port = netdev_priv(dev); |
| 47 | + |
| 48 | + phy_stop(port->phydev); |
| 49 | +} |
| 50 | |
| 51 | static inline void debug_pkt(struct net_device *dev, const char *func, |
| 52 | u8 *data, int len) |
| 53 | @@ -1005,8 +1049,7 @@ static int eth_open(struct net_device *d |
| 54 | return err; |
| 55 | } |
| 56 | |
| 57 | - port->speed = 0; /* force "link up" message */ |
| 58 | - phy_start(port->phydev); |
| 59 | + ixp4xx_phy_start(dev); |
| 60 | |
| 61 | for (i = 0; i < ETH_ALEN; i++) |
| 62 | __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]); |
| 63 | @@ -1127,7 +1170,7 @@ static int eth_close(struct net_device * |
| 64 | printk(KERN_CRIT "%s: unable to disable loopback\n", |
| 65 | dev->name); |
| 66 | |
| 67 | - phy_stop(port->phydev); |
| 68 | + ixp4xx_phy_stop(dev); |
| 69 | |
| 70 | if (!ports_open) |
| 71 | qmgr_disable_irq(TXDONE_QUEUE); |
| 72 | @@ -1153,7 +1196,6 @@ static int __devinit eth_init_one(struct |
| 73 | struct net_device *dev; |
| 74 | struct eth_plat_info *plat = pdev->dev.platform_data; |
| 75 | u32 regs_phys; |
| 76 | - char phy_id[MII_BUS_ID_SIZE + 3]; |
| 77 | int err; |
| 78 | |
| 79 | if (!(dev = alloc_etherdev(sizeof(struct port)))) |
| 80 | @@ -1211,18 +1253,10 @@ static int __devinit eth_init_one(struct |
| 81 | __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control); |
| 82 | udelay(50); |
| 83 | |
| 84 | - snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy); |
| 85 | - port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0, |
| 86 | - PHY_INTERFACE_MODE_MII); |
| 87 | - if ((err = IS_ERR(port->phydev))) |
| 88 | + err = ixp4xx_phy_connect(dev); |
| 89 | + if (err) |
| 90 | goto err_free_mem; |
| 91 | |
| 92 | - /* mask with MAC supported features */ |
| 93 | - port->phydev->supported &= PHY_BASIC_FEATURES; |
| 94 | - port->phydev->advertising = port->phydev->supported; |
| 95 | - |
| 96 | - port->phydev->irq = PHY_POLL; |
| 97 | - |
| 98 | if ((err = register_netdev(dev))) |
| 99 | goto err_phy_dis; |
| 100 | |
| 101 | @@ -1232,7 +1266,7 @@ static int __devinit eth_init_one(struct |
| 102 | return 0; |
| 103 | |
| 104 | err_phy_dis: |
| 105 | - phy_disconnect(port->phydev); |
| 106 | + ixp4xx_phy_disconnect(port->phydev); |
| 107 | err_free_mem: |
| 108 | npe_port_tab[NPE_ID(port->id)] = NULL; |
| 109 | platform_set_drvdata(pdev, NULL); |
| 110 | @@ -1250,7 +1284,7 @@ static int __devexit eth_remove_one(stru |
| 111 | struct port *port = netdev_priv(dev); |
| 112 | |
| 113 | unregister_netdev(dev); |
| 114 | - phy_disconnect(port->phydev); |
| 115 | + ixp4xx_phy_disconnect(dev); |
| 116 | npe_port_tab[NPE_ID(port->id)] = NULL; |
| 117 | platform_set_drvdata(pdev, NULL); |
| 118 | npe_release(port->npe); |
target/linux/ixp4xx/patches-2.6.33/207-npe_driver_multiphy_support.patch |
| 1 | TODO: take care of additional PHYs through the PHY abstraction layer |
| 2 | |
| 3 | --- a/arch/arm/mach-ixp4xx/include/mach/platform.h |
| 4 | @@ -72,7 +72,7 @@ extern unsigned long ixp4xx_exp_bus_size |
| 5 | /* |
| 6 | * Clock Speed Definitions. |
| 7 | */ |
| 8 | -#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */ |
| 9 | +#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */ |
| 10 | #define IXP4XX_UART_XTAL 14745600 |
| 11 | |
| 12 | /* |
| 13 | @@ -95,12 +95,23 @@ struct sys_timer; |
| 14 | #define IXP4XX_ETH_NPEB 0x10 |
| 15 | #define IXP4XX_ETH_NPEC 0x20 |
| 16 | |
| 17 | +#define IXP4XX_ETH_PHY_MAX_ADDR 32 |
| 18 | + |
| 19 | /* Information about built-in Ethernet MAC interfaces */ |
| 20 | struct eth_plat_info { |
| 21 | u8 phy; /* MII PHY ID, 0 - 31 */ |
| 22 | u8 rxq; /* configurable, currently 0 - 31 only */ |
| 23 | u8 txreadyq; |
| 24 | u8 hwaddr[6]; |
| 25 | + |
| 26 | + u32 phy_mask; |
| 27 | +#if 0 |
| 28 | + int speed; |
| 29 | + int duplex; |
| 30 | +#else |
| 31 | + int speed_10; |
| 32 | + int half_duplex; |
| 33 | +#endif |
| 34 | }; |
| 35 | |
| 36 | /* Information about built-in HSS (synchronous serial) interfaces */ |
| 37 | --- a/drivers/net/arm/ixp4xx_eth.c |
| 38 | @@ -417,6 +417,37 @@ static int ixp4xx_phy_connect(struct net |
| 39 | struct eth_plat_info *plat = port->plat; |
| 40 | char phy_id[MII_BUS_ID_SIZE + 3]; |
| 41 | |
| 42 | + if (plat->phy == IXP4XX_ETH_PHY_MAX_ADDR) { |
| 43 | +#if 0 |
| 44 | + switch (plat->speed) { |
| 45 | + case SPEED_10: |
| 46 | + case SPEED_100: |
| 47 | + break; |
| 48 | + default: |
| 49 | + printk(KERN_ERR "%s: invalid speed (%d)\n", |
| 50 | + dev->name, plat->speed); |
| 51 | + return -EINVAL; |
| 52 | + } |
| 53 | + |
| 54 | + switch (plat->duplex) { |
| 55 | + case DUPLEX_HALF: |
| 56 | + case DUPLEX_FULL: |
| 57 | + break; |
| 58 | + default: |
| 59 | + printk(KERN_ERR "%s: invalid duplex mode (%d)\n", |
| 60 | + dev->name, plat->duplex); |
| 61 | + return -EINVAL; |
| 62 | + } |
| 63 | + port->speed = plat->speed; |
| 64 | + port->duplex = plat->duplex; |
| 65 | +#else |
| 66 | + port->speed = plat->speed_10 ? SPEED_10 : SPEED_100; |
| 67 | + port->duplex = plat->half_duplex ? DUPLEX_HALF : DUPLEX_FULL; |
| 68 | +#endif |
| 69 | + |
| 70 | + return 0; |
| 71 | + } |
| 72 | + |
| 73 | snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, "0", plat->phy); |
| 74 | port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, 0, |
| 75 | PHY_INTERFACE_MODE_MII); |
| 76 | @@ -438,21 +469,32 @@ static void ixp4xx_phy_disconnect(struct |
| 77 | { |
| 78 | struct port *port = netdev_priv(dev); |
| 79 | |
| 80 | - phy_disconnect(port->phydev); |
| 81 | + if (port->phydev) |
| 82 | + phy_disconnect(port->phydev); |
| 83 | } |
| 84 | |
| 85 | static void ixp4xx_phy_start(struct net_device *dev) |
| 86 | { |
| 87 | struct port *port = netdev_priv(dev); |
| 88 | |
| 89 | - phy_start(port->phydev); |
| 90 | + if (port->phydev) { |
| 91 | + phy_start(port->phydev); |
| 92 | + } else { |
| 93 | + port->link = 1; |
| 94 | + ixp4xx_update_link(dev); |
| 95 | + } |
| 96 | } |
| 97 | |
| 98 | static void ixp4xx_phy_stop(struct net_device *dev) |
| 99 | { |
| 100 | struct port *port = netdev_priv(dev); |
| 101 | |
| 102 | - phy_stop(port->phydev); |
| 103 | + if (port->phydev) { |
| 104 | + phy_stop(port->phydev); |
| 105 | + } else { |
| 106 | + port->link = 0; |
| 107 | + ixp4xx_update_link(dev); |
| 108 | + } |
| 109 | } |
| 110 | |
| 111 | static inline void debug_pkt(struct net_device *dev, const char *func, |
| 112 | @@ -826,6 +868,10 @@ static int eth_ioctl(struct net_device * |
| 113 | |
| 114 | if (!netif_running(dev)) |
| 115 | return -EINVAL; |
| 116 | + |
| 117 | + if (!port->phydev) |
| 118 | + return -EOPNOTSUPP; |
| 119 | + |
| 120 | return phy_mii_ioctl(port->phydev, if_mii(req), cmd); |
| 121 | } |
| 122 | |
| 123 | @@ -845,18 +891,30 @@ static void ixp4xx_get_drvinfo(struct ne |
| 124 | static int ixp4xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 125 | { |
| 126 | struct port *port = netdev_priv(dev); |
| 127 | + |
| 128 | + if (!port->phydev) |
| 129 | + return -EOPNOTSUPP; |
| 130 | + |
| 131 | return phy_ethtool_gset(port->phydev, cmd); |
| 132 | } |
| 133 | |
| 134 | static int ixp4xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 135 | { |
| 136 | struct port *port = netdev_priv(dev); |
| 137 | + |
| 138 | + if (!port->phydev) |
| 139 | + return -EOPNOTSUPP; |
| 140 | + |
| 141 | return phy_ethtool_sset(port->phydev, cmd); |
| 142 | } |
| 143 | |
| 144 | static int ixp4xx_nway_reset(struct net_device *dev) |
| 145 | { |
| 146 | struct port *port = netdev_priv(dev); |
| 147 | + |
| 148 | + if (!port->phydev) |
| 149 | + return -EOPNOTSUPP; |
| 150 | + |
| 151 | return phy_start_aneg(port->phydev); |
| 152 | } |
| 153 | |
target/linux/ixp4xx/patches-2.6.33/295-latch_led_driver.patch |
| 1 | --- a/drivers/leds/Kconfig |
| 2 | @@ -157,6 +157,13 @@ config LEDS_LP3944 |
| 3 | To compile this driver as a module, choose M here: the |
| 4 | module will be called leds-lp3944. |
| 5 | |
| 6 | +config LEDS_LATCH |
| 7 | + tristate "LED Support for Memory Latched LEDs" |
| 8 | + depends on LEDS_CLASS |
| 9 | + help |
| 10 | + -- To Do -- |
| 11 | + |
| 12 | + |
| 13 | config LEDS_CLEVO_MAIL |
| 14 | tristate "Mail LED on Clevo notebook" |
| 15 | depends on LEDS_CLASS && X86 && SERIO_I8042 && DMI |
| 16 | --- /dev/null |
| 17 | @@ -0,0 +1,149 @@ |
| 18 | +/* |
| 19 | + * LEDs driver for Memory Latched Devices |
| 20 | + * |
| 21 | + * Copyright (C) 2008 Gateworks Corp. |
| 22 | + * Chris Lang <clang@gateworks.com> |
| 23 | + * |
| 24 | + * This program is free software; you can redistribute it and/or modify |
| 25 | + * it under the terms of the GNU General Public License version 2 as |
| 26 | + * published by the Free Software Foundation. |
| 27 | + * |
| 28 | + */ |
| 29 | +#include <linux/kernel.h> |
| 30 | +#include <linux/init.h> |
| 31 | +#include <linux/platform_device.h> |
| 32 | +#include <linux/leds.h> |
| 33 | +#include <linux/workqueue.h> |
| 34 | +#include <asm/io.h> |
| 35 | +#include <linux/spinlock.h> |
| 36 | + |
| 37 | +static unsigned int mem_keep = 0xFF; |
| 38 | +static spinlock_t mem_lock; |
| 39 | +static unsigned char *iobase; |
| 40 | + |
| 41 | +struct latch_led_data { |
| 42 | + struct led_classdev cdev; |
| 43 | + struct work_struct work; |
| 44 | + u8 new_level; |
| 45 | + u8 bit; |
| 46 | + void (*set_led)(u8 bit, enum led_brightness value); |
| 47 | +}; |
| 48 | + |
| 49 | +static void latch_set_led(u8 bit, enum led_brightness value) |
| 50 | +{ |
| 51 | + if (value == LED_OFF) |
| 52 | + mem_keep |= (0x1 << bit); |
| 53 | + else |
| 54 | + mem_keep &= ~(0x1 << bit); |
| 55 | + |
| 56 | + writeb(mem_keep, iobase); |
| 57 | +} |
| 58 | + |
| 59 | +static void latch_led_set(struct led_classdev *led_cdev, |
| 60 | + enum led_brightness value) |
| 61 | +{ |
| 62 | + struct latch_led_data *led_dat = |
| 63 | + container_of(led_cdev, struct latch_led_data, cdev); |
| 64 | + |
| 65 | + raw_spin_lock(mem_lock); |
| 66 | + |
| 67 | + led_dat->set_led(led_dat->bit, value); |
| 68 | + |
| 69 | + raw_spin_unlock(mem_lock); |
| 70 | +} |
| 71 | + |
| 72 | +static int latch_led_probe(struct platform_device *pdev) |
| 73 | +{ |
| 74 | + struct latch_led_platform_data *pdata = pdev->dev.platform_data; |
| 75 | + struct latch_led *cur_led; |
| 76 | + struct latch_led_data *leds_data, *led_dat; |
| 77 | + int i, ret = 0; |
| 78 | + |
| 79 | + if (!pdata) |
| 80 | + return -EBUSY; |
| 81 | + |
| 82 | + leds_data = kzalloc(sizeof(struct latch_led_data) * pdata->num_leds, |
| 83 | + GFP_KERNEL); |
| 84 | + if (!leds_data) |
| 85 | + return -ENOMEM; |
| 86 | + |
| 87 | + for (i = 0; i < pdata->num_leds; i++) { |
| 88 | + cur_led = &pdata->leds[i]; |
| 89 | + led_dat = &leds_data[i]; |
| 90 | + |
| 91 | + led_dat->cdev.name = cur_led->name; |
| 92 | + led_dat->cdev.default_trigger = cur_led->default_trigger; |
| 93 | + led_dat->cdev.brightness_set = latch_led_set; |
| 94 | + led_dat->cdev.brightness = LED_OFF; |
| 95 | + led_dat->bit = cur_led->bit; |
| 96 | + led_dat->set_led = pdata->set_led ? pdata->set_led : latch_set_led; |
| 97 | + |
| 98 | + ret = led_classdev_register(&pdev->dev, &led_dat->cdev); |
| 99 | + if (ret < 0) { |
| 100 | + goto err; |
| 101 | + } |
| 102 | + } |
| 103 | + |
| 104 | + if (!pdata->set_led) { |
| 105 | + iobase = ioremap_nocache(pdata->mem, 0x1000); |
| 106 | + writeb(0xFF, iobase); |
| 107 | + } |
| 108 | + platform_set_drvdata(pdev, leds_data); |
| 109 | + |
| 110 | + return 0; |
| 111 | + |
| 112 | +err: |
| 113 | + if (i > 0) { |
| 114 | + for (i = i - 1; i >= 0; i--) { |
| 115 | + led_classdev_unregister(&leds_data[i].cdev); |
| 116 | + } |
| 117 | + } |
| 118 | + |
| 119 | + kfree(leds_data); |
| 120 | + |
| 121 | + return ret; |
| 122 | +} |
| 123 | + |
| 124 | +static int __devexit latch_led_remove(struct platform_device *pdev) |
| 125 | +{ |
| 126 | + int i; |
| 127 | + struct latch_led_platform_data *pdata = pdev->dev.platform_data; |
| 128 | + struct latch_led_data *leds_data; |
| 129 | + |
| 130 | + leds_data = platform_get_drvdata(pdev); |
| 131 | + |
| 132 | + for (i = 0; i < pdata->num_leds; i++) { |
| 133 | + led_classdev_unregister(&leds_data[i].cdev); |
| 134 | + cancel_work_sync(&leds_data[i].work); |
| 135 | + } |
| 136 | + |
| 137 | + kfree(leds_data); |
| 138 | + |
| 139 | + return 0; |
| 140 | +} |
| 141 | + |
| 142 | +static struct platform_driver latch_led_driver = { |
| 143 | + .probe = latch_led_probe, |
| 144 | + .remove = __devexit_p(latch_led_remove), |
| 145 | + .driver = { |
| 146 | + .name = "leds-latch", |
| 147 | + .owner = THIS_MODULE, |
| 148 | + }, |
| 149 | +}; |
| 150 | + |
| 151 | +static int __init latch_led_init(void) |
| 152 | +{ |
| 153 | + return platform_driver_register(&latch_led_driver); |
| 154 | +} |
| 155 | + |
| 156 | +static void __exit latch_led_exit(void) |
| 157 | +{ |
| 158 | + platform_driver_unregister(&latch_led_driver); |
| 159 | +} |
| 160 | + |
| 161 | +module_init(latch_led_init); |
| 162 | +module_exit(latch_led_exit); |
| 163 | + |
| 164 | +MODULE_AUTHOR("Chris Lang <clang@gateworks.com>"); |
| 165 | +MODULE_DESCRIPTION("Latch LED driver"); |
| 166 | +MODULE_LICENSE("GPL"); |
| 167 | --- a/drivers/leds/Makefile |
| 168 | @@ -20,6 +20,7 @@ obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-c |
| 169 | obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o |
| 170 | obj-$(CONFIG_LEDS_PCA9532) += leds-pca9532.o |
| 171 | obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o |
| 172 | +obj-$(CONFIG_LEDS_LATCH) += leds-latch.o |
| 173 | obj-$(CONFIG_LEDS_LP3944) += leds-lp3944.o |
| 174 | obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o |
| 175 | obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o |
| 176 | --- a/include/linux/leds.h |
| 177 | @@ -161,5 +161,19 @@ struct gpio_led_platform_data { |
| 178 | unsigned long *delay_off); |
| 179 | }; |
| 180 | |
| 181 | +/* For the leds-latch driver */ |
| 182 | +struct latch_led { |
| 183 | + const char *name; |
| 184 | + char *default_trigger; |
| 185 | + unsigned bit; |
| 186 | +}; |
| 187 | + |
| 188 | +struct latch_led_platform_data { |
| 189 | + int num_leds; |
| 190 | + u32 mem; |
| 191 | + struct latch_led *leds; |
| 192 | + void (*set_led)(u8 bit, enum led_brightness value); |
| 193 | +}; |
| 194 | + |
| 195 | |
| 196 | #endif /* __LINUX_LEDS_H_INCLUDED */ |
target/linux/ixp4xx/patches-2.6.33/300-avila_fetch_mac.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/avila-setup.c |
| 2 | @@ -14,10 +14,16 @@ |
| 3 | #include <linux/kernel.h> |
| 4 | #include <linux/init.h> |
| 5 | #include <linux/device.h> |
| 6 | +#include <linux/if_ether.h> |
| 7 | +#include <linux/socket.h> |
| 8 | +#include <linux/netdevice.h> |
| 9 | #include <linux/serial.h> |
| 10 | #include <linux/tty.h> |
| 11 | #include <linux/serial_8250.h> |
| 12 | #include <linux/slab.h> |
| 13 | +#include <linux/i2c.h> |
| 14 | +#include <linux/i2c/at24.h> |
| 15 | + |
| 16 | #include <linux/i2c-gpio.h> |
| 17 | #include <asm/types.h> |
| 18 | #include <asm/setup.h> |
| 19 | @@ -31,6 +37,13 @@ |
| 20 | #define AVILA_SDA_PIN 7 |
| 21 | #define AVILA_SCL_PIN 6 |
| 22 | |
| 23 | +struct avila_board_info { |
| 24 | + unsigned char *model; |
| 25 | + void (*setup)(void); |
| 26 | +}; |
| 27 | + |
| 28 | +static struct avila_board_info *avila_info __initdata; |
| 29 | + |
| 30 | static struct flash_platform_data avila_flash_data = { |
| 31 | .map_name = "cfi_probe", |
| 32 | .width = 2, |
| 33 | @@ -134,16 +147,181 @@ static struct platform_device avila_pata |
| 34 | .resource = avila_pata_resources, |
| 35 | }; |
| 36 | |
| 37 | +/* Built-in 10/100 Ethernet MAC interfaces */ |
| 38 | +static struct eth_plat_info avila_npeb_data = { |
| 39 | + .phy = 0, |
| 40 | + .rxq = 3, |
| 41 | + .txreadyq = 20, |
| 42 | +}; |
| 43 | + |
| 44 | +static struct eth_plat_info avila_npec_data = { |
| 45 | + .phy = 1, |
| 46 | + .rxq = 4, |
| 47 | + .txreadyq = 21, |
| 48 | +}; |
| 49 | + |
| 50 | +static struct platform_device avila_npeb_device = { |
| 51 | + .name = "ixp4xx_eth", |
| 52 | + .id = IXP4XX_ETH_NPEB, |
| 53 | + .dev.platform_data = &avila_npeb_data, |
| 54 | +}; |
| 55 | + |
| 56 | +static struct platform_device avila_npec_device = { |
| 57 | + .name = "ixp4xx_eth", |
| 58 | + .id = IXP4XX_ETH_NPEC, |
| 59 | + .dev.platform_data = &avila_npec_data, |
| 60 | +}; |
| 61 | + |
| 62 | static struct platform_device *avila_devices[] __initdata = { |
| 63 | &avila_i2c_gpio, |
| 64 | &avila_flash, |
| 65 | &avila_uart |
| 66 | }; |
| 67 | |
| 68 | +static void __init avila_gw23xx_setup(void) |
| 69 | +{ |
| 70 | + platform_device_register(&avila_npeb_device); |
| 71 | + platform_device_register(&avila_npec_device); |
| 72 | +} |
| 73 | + |
| 74 | +static void __init avila_gw2342_setup(void) |
| 75 | +{ |
| 76 | + platform_device_register(&avila_npeb_device); |
| 77 | + platform_device_register(&avila_npec_device); |
| 78 | +} |
| 79 | + |
| 80 | +static void __init avila_gw2345_setup(void) |
| 81 | +{ |
| 82 | + avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; |
| 83 | + avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */ |
| 84 | + platform_device_register(&avila_npeb_device); |
| 85 | + |
| 86 | + avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */ |
| 87 | + platform_device_register(&avila_npec_device); |
| 88 | +} |
| 89 | + |
| 90 | +static void __init avila_gw2347_setup(void) |
| 91 | +{ |
| 92 | + platform_device_register(&avila_npeb_device); |
| 93 | +} |
| 94 | + |
| 95 | +static void __init avila_gw2348_setup(void) |
| 96 | +{ |
| 97 | + platform_device_register(&avila_npeb_device); |
| 98 | + platform_device_register(&avila_npec_device); |
| 99 | +} |
| 100 | + |
| 101 | +static void __init avila_gw2353_setup(void) |
| 102 | +{ |
| 103 | + platform_device_register(&avila_npeb_device); |
| 104 | +} |
| 105 | + |
| 106 | +static void __init avila_gw2355_setup(void) |
| 107 | +{ |
| 108 | + avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; |
| 109 | + avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */ |
| 110 | + platform_device_register(&avila_npeb_device); |
| 111 | + |
| 112 | + avila_npec_data.phy = 16; |
| 113 | + platform_device_register(&avila_npec_device); |
| 114 | +} |
| 115 | + |
| 116 | +static void __init avila_gw2357_setup(void) |
| 117 | +{ |
| 118 | + platform_device_register(&avila_npeb_device); |
| 119 | +} |
| 120 | + |
| 121 | +static struct avila_board_info avila_boards[] __initdata = { |
| 122 | + { |
| 123 | + .model = "GW2342", |
| 124 | + .setup = avila_gw2342_setup, |
| 125 | + }, { |
| 126 | + .model = "GW2345", |
| 127 | + .setup = avila_gw2345_setup, |
| 128 | + }, { |
| 129 | + .model = "GW2347", |
| 130 | + .setup = avila_gw2347_setup, |
| 131 | + }, { |
| 132 | + .model = "GW2348", |
| 133 | + .setup = avila_gw2348_setup, |
| 134 | + }, { |
| 135 | + .model = "GW2353", |
| 136 | + .setup = avila_gw2353_setup, |
| 137 | + }, { |
| 138 | + .model = "GW2355", |
| 139 | + .setup = avila_gw2355_setup, |
| 140 | + }, { |
| 141 | + .model = "GW2357", |
| 142 | + .setup = avila_gw2357_setup, |
| 143 | + } |
| 144 | +}; |
| 145 | + |
| 146 | +static struct avila_board_info * __init avila_find_board_info(char *model) |
| 147 | +{ |
| 148 | + int i; |
| 149 | + model[6] = '\0'; |
| 150 | + |
| 151 | + for (i = 0; i < ARRAY_SIZE(avila_boards); i++) { |
| 152 | + struct avila_board_info *info = &avila_boards[i]; |
| 153 | + if (strcmp(info->model, model) == 0) |
| 154 | + return info; |
| 155 | + } |
| 156 | + |
| 157 | + return NULL; |
| 158 | +} |
| 159 | + |
| 160 | +static struct memory_accessor *at24_mem_acc; |
| 161 | + |
| 162 | +static void at24_setup(struct memory_accessor *mem_acc, void *context) |
| 163 | +{ |
| 164 | + char mac_addr[ETH_ALEN]; |
| 165 | + char model[7]; |
| 166 | + |
| 167 | + at24_mem_acc = mem_acc; |
| 168 | + |
| 169 | + /* Read MAC addresses */ |
| 170 | + if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x0, 6) == 6) { |
| 171 | + memcpy(&avila_npeb_data.hwaddr, mac_addr, ETH_ALEN); |
| 172 | + } |
| 173 | + if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x6, 6) == 6) { |
| 174 | + memcpy(&avila_npec_data.hwaddr, mac_addr, ETH_ALEN); |
| 175 | + } |
| 176 | + |
| 177 | + /* Read the first 6 bytes of the model number */ |
| 178 | + if (at24_mem_acc->read(at24_mem_acc, model, 0x20, 6) == 6) { |
| 179 | + avila_info = avila_find_board_info(model); |
| 180 | + } |
| 181 | + |
| 182 | +} |
| 183 | + |
| 184 | +static struct at24_platform_data avila_eeprom_info = { |
| 185 | + .byte_len = 1024, |
| 186 | + .page_size = 16, |
| 187 | + .flags = AT24_FLAG_READONLY, |
| 188 | + .setup = at24_setup, |
| 189 | +}; |
| 190 | + |
| 191 | +static struct i2c_board_info __initdata avila_i2c_board_info[] = { |
| 192 | + { |
| 193 | + I2C_BOARD_INFO("ds1672", 0x68), |
| 194 | + }, |
| 195 | + { |
| 196 | + I2C_BOARD_INFO("ad7418", 0x28), |
| 197 | + }, |
| 198 | + { |
| 199 | + I2C_BOARD_INFO("24c08", 0x51), |
| 200 | + .platform_data = &avila_eeprom_info |
| 201 | + }, |
| 202 | +}; |
| 203 | + |
| 204 | static void __init avila_init(void) |
| 205 | { |
| 206 | ixp4xx_sys_init(); |
| 207 | |
| 208 | + /* |
| 209 | + * These devices are present on all Avila models and don't need any |
| 210 | + * model specific setup. |
| 211 | + */ |
| 212 | avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 213 | avila_flash_resource.end = |
| 214 | IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; |
| 215 | @@ -161,7 +339,28 @@ static void __init avila_init(void) |
| 216 | |
| 217 | platform_device_register(&avila_pata); |
| 218 | |
| 219 | + i2c_register_board_info(0, avila_i2c_board_info, |
| 220 | + ARRAY_SIZE(avila_i2c_board_info)); |
| 221 | +} |
| 222 | + |
| 223 | +static int __init avila_model_setup(void) |
| 224 | +{ |
| 225 | + if (!machine_is_avila()) |
| 226 | + return 0; |
| 227 | + |
| 228 | + if (avila_info) { |
| 229 | + printk(KERN_DEBUG "Running on Gateworks Avila %s\n", |
| 230 | + avila_info->model); |
| 231 | + avila_info->setup(); |
| 232 | + } else { |
| 233 | + printk(KERN_INFO "Unknown/missing Avila model number" |
| 234 | + " -- defaults will be used\n"); |
| 235 | + avila_gw23xx_setup(); |
| 236 | + } |
| 237 | + |
| 238 | + return 0; |
| 239 | } |
| 240 | +late_initcall(avila_model_setup); |
| 241 | |
| 242 | MACHINE_START(AVILA, "Gateworks Avila Network Platform") |
| 243 | /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */ |
target/linux/ixp4xx/patches-2.6.33/301-avila_led.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/avila-setup.c |
| 2 | @@ -24,6 +24,7 @@ |
| 3 | #include <linux/i2c.h> |
| 4 | #include <linux/i2c/at24.h> |
| 5 | |
| 6 | +#include <linux/leds.h> |
| 7 | #include <linux/i2c-gpio.h> |
| 8 | #include <asm/types.h> |
| 9 | #include <asm/setup.h> |
| 10 | @@ -172,6 +173,72 @@ static struct platform_device avila_npec |
| 11 | .dev.platform_data = &avila_npec_data, |
| 12 | }; |
| 13 | |
| 14 | +static struct gpio_led avila_gpio_leds[] = { |
| 15 | + { |
| 16 | + .name = "user", /* green led */ |
| 17 | + .gpio = AVILA_GW23XX_LED_USER_GPIO, |
| 18 | + .active_low = 1, |
| 19 | + } |
| 20 | +}; |
| 21 | + |
| 22 | +static struct gpio_led_platform_data avila_gpio_leds_data = { |
| 23 | + .num_leds = 1, |
| 24 | + .leds = avila_gpio_leds, |
| 25 | +}; |
| 26 | + |
| 27 | +static struct platform_device avila_gpio_leds_device = { |
| 28 | + .name = "leds-gpio", |
| 29 | + .id = -1, |
| 30 | + .dev.platform_data = &avila_gpio_leds_data, |
| 31 | +}; |
| 32 | + |
| 33 | +static struct latch_led avila_latch_leds[] = { |
| 34 | + { |
| 35 | + .name = "led0", /* green led */ |
| 36 | + .bit = 0, |
| 37 | + }, |
| 38 | + { |
| 39 | + .name = "led1", /* green led */ |
| 40 | + .bit = 1, |
| 41 | + }, |
| 42 | + { |
| 43 | + .name = "led2", /* green led */ |
| 44 | + .bit = 2, |
| 45 | + }, |
| 46 | + { |
| 47 | + .name = "led3", /* green led */ |
| 48 | + .bit = 3, |
| 49 | + }, |
| 50 | + { |
| 51 | + .name = "led4", /* green led */ |
| 52 | + .bit = 4, |
| 53 | + }, |
| 54 | + { |
| 55 | + .name = "led5", /* green led */ |
| 56 | + .bit = 5, |
| 57 | + }, |
| 58 | + { |
| 59 | + .name = "led6", /* green led */ |
| 60 | + .bit = 6, |
| 61 | + }, |
| 62 | + { |
| 63 | + .name = "led7", /* green led */ |
| 64 | + .bit = 7, |
| 65 | + } |
| 66 | +}; |
| 67 | + |
| 68 | +static struct latch_led_platform_data avila_latch_leds_data = { |
| 69 | + .num_leds = 8, |
| 70 | + .leds = avila_latch_leds, |
| 71 | + .mem = 0x51000000, |
| 72 | +}; |
| 73 | + |
| 74 | +static struct platform_device avila_latch_leds_device = { |
| 75 | + .name = "leds-latch", |
| 76 | + .id = -1, |
| 77 | + .dev.platform_data = &avila_latch_leds_data, |
| 78 | +}; |
| 79 | + |
| 80 | static struct platform_device *avila_devices[] __initdata = { |
| 81 | &avila_i2c_gpio, |
| 82 | &avila_flash, |
| 83 | @@ -182,12 +249,16 @@ static void __init avila_gw23xx_setup(vo |
| 84 | { |
| 85 | platform_device_register(&avila_npeb_device); |
| 86 | platform_device_register(&avila_npec_device); |
| 87 | + |
| 88 | + platform_device_register(&avila_gpio_leds_device); |
| 89 | } |
| 90 | |
| 91 | static void __init avila_gw2342_setup(void) |
| 92 | { |
| 93 | platform_device_register(&avila_npeb_device); |
| 94 | platform_device_register(&avila_npec_device); |
| 95 | + |
| 96 | + platform_device_register(&avila_gpio_leds_device); |
| 97 | } |
| 98 | |
| 99 | static void __init avila_gw2345_setup(void) |
| 100 | @@ -198,22 +269,30 @@ static void __init avila_gw2345_setup(vo |
| 101 | |
| 102 | avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */ |
| 103 | platform_device_register(&avila_npec_device); |
| 104 | + |
| 105 | + platform_device_register(&avila_gpio_leds_device); |
| 106 | } |
| 107 | |
| 108 | static void __init avila_gw2347_setup(void) |
| 109 | { |
| 110 | platform_device_register(&avila_npeb_device); |
| 111 | + |
| 112 | + avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO; |
| 113 | + platform_device_register(&avila_gpio_leds_device); |
| 114 | } |
| 115 | |
| 116 | static void __init avila_gw2348_setup(void) |
| 117 | { |
| 118 | platform_device_register(&avila_npeb_device); |
| 119 | platform_device_register(&avila_npec_device); |
| 120 | + |
| 121 | + platform_device_register(&avila_gpio_leds_device); |
| 122 | } |
| 123 | |
| 124 | static void __init avila_gw2353_setup(void) |
| 125 | { |
| 126 | platform_device_register(&avila_npeb_device); |
| 127 | + platform_device_register(&avila_gpio_leds_device); |
| 128 | } |
| 129 | |
| 130 | static void __init avila_gw2355_setup(void) |
| 131 | @@ -224,11 +303,29 @@ static void __init avila_gw2355_setup(vo |
| 132 | |
| 133 | avila_npec_data.phy = 16; |
| 134 | platform_device_register(&avila_npec_device); |
| 135 | + |
| 136 | + platform_device_register(&avila_gpio_leds_device); |
| 137 | + |
| 138 | + *IXP4XX_EXP_CS4 |= 0xbfff3c03; |
| 139 | + avila_latch_leds[0].name = "RXD"; |
| 140 | + avila_latch_leds[1].name = "TXD"; |
| 141 | + avila_latch_leds[2].name = "POL"; |
| 142 | + avila_latch_leds[3].name = "LNK"; |
| 143 | + avila_latch_leds[4].name = "ERR"; |
| 144 | + avila_latch_leds_data.num_leds = 5; |
| 145 | + avila_latch_leds_data.mem = 0x54000000; |
| 146 | + platform_device_register(&avila_latch_leds_device); |
| 147 | } |
| 148 | |
| 149 | static void __init avila_gw2357_setup(void) |
| 150 | { |
| 151 | platform_device_register(&avila_npeb_device); |
| 152 | + |
| 153 | + avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO; |
| 154 | + platform_device_register(&avila_gpio_leds_device); |
| 155 | + |
| 156 | + *IXP4XX_EXP_CS1 |= 0xbfff3c03; |
| 157 | + platform_device_register(&avila_latch_leds_device); |
| 158 | } |
| 159 | |
| 160 | static struct avila_board_info avila_boards[] __initdata = { |
target/linux/ixp4xx/patches-2.6.33/312-ixp4xx_pata_optimization.patch |
| 1 | --- a/drivers/ata/pata_ixp4xx_cf.c |
| 2 | @@ -24,16 +24,58 @@ |
| 3 | #include <scsi/scsi_host.h> |
| 4 | |
| 5 | #define DRV_NAME "pata_ixp4xx_cf" |
| 6 | -#define DRV_VERSION "0.2" |
| 7 | +#define DRV_VERSION "0.3" |
| 8 | |
| 9 | static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error) |
| 10 | { |
| 11 | struct ata_device *dev; |
| 12 | + struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data; |
| 13 | + unsigned int pio_mask; |
| 14 | |
| 15 | ata_for_each_dev(dev, link, ENABLED) { |
| 16 | - ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n"); |
| 17 | - dev->pio_mode = XFER_PIO_0; |
| 18 | - dev->xfer_mode = XFER_PIO_0; |
| 19 | + if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)) { |
| 20 | + pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03; |
| 21 | + if (pio_mask & (1 << 1)) { |
| 22 | + pio_mask = 4; |
| 23 | + } else { |
| 24 | + pio_mask = 3; |
| 25 | + } |
| 26 | + } else { |
| 27 | + pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8); |
| 28 | + } |
| 29 | + |
| 30 | + switch (pio_mask){ |
| 31 | + case 0: |
| 32 | + ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n"); |
| 33 | + dev->pio_mode = XFER_PIO_0; |
| 34 | + dev->xfer_mode = XFER_PIO_0; |
| 35 | + *data->cs0_cfg = 0x8a473c03; |
| 36 | + break; |
| 37 | + case 1: |
| 38 | + ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n"); |
| 39 | + dev->pio_mode = XFER_PIO_1; |
| 40 | + dev->xfer_mode = XFER_PIO_1; |
| 41 | + *data->cs0_cfg = 0x86433c03; |
| 42 | + break; |
| 43 | + case 2: |
| 44 | + ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n"); |
| 45 | + dev->pio_mode = XFER_PIO_2; |
| 46 | + dev->xfer_mode = XFER_PIO_2; |
| 47 | + *data->cs0_cfg = 0x82413c03; |
| 48 | + break; |
| 49 | + case 3: |
| 50 | + ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n"); |
| 51 | + dev->pio_mode = XFER_PIO_3; |
| 52 | + dev->xfer_mode = XFER_PIO_3; |
| 53 | + *data->cs0_cfg = 0x80823c03; |
| 54 | + break; |
| 55 | + case 4: |
| 56 | + ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n"); |
| 57 | + dev->pio_mode = XFER_PIO_4; |
| 58 | + dev->xfer_mode = XFER_PIO_4; |
| 59 | + *data->cs0_cfg = 0x80403c03; |
| 60 | + break; |
| 61 | + } |
| 62 | dev->xfer_shift = ATA_SHIFT_PIO; |
| 63 | dev->flags |= ATA_DFLAG_PIO; |
| 64 | } |
| 65 | @@ -46,6 +88,7 @@ static unsigned int ixp4xx_mmio_data_xfe |
| 66 | unsigned int i; |
| 67 | unsigned int words = buflen >> 1; |
| 68 | u16 *buf16 = (u16 *) buf; |
| 69 | + unsigned int pio_mask; |
| 70 | struct ata_port *ap = dev->link->ap; |
| 71 | void __iomem *mmio = ap->ioaddr.data_addr; |
| 72 | struct ixp4xx_pata_data *data = ap->host->dev->platform_data; |
| 73 | @@ -53,8 +96,34 @@ static unsigned int ixp4xx_mmio_data_xfe |
| 74 | /* set the expansion bus in 16bit mode and restore |
| 75 | * 8 bit mode after the transaction. |
| 76 | */ |
| 77 | - *data->cs0_cfg &= ~(0x01); |
| 78 | - udelay(100); |
| 79 | + if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){ |
| 80 | + pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03; |
| 81 | + if (pio_mask & (1 << 1)){ |
| 82 | + pio_mask = 4; |
| 83 | + }else{ |
| 84 | + pio_mask = 3; |
| 85 | + } |
| 86 | + }else{ |
| 87 | + pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8); |
| 88 | + } |
| 89 | + switch (pio_mask){ |
| 90 | + case 0: |
| 91 | + *data->cs0_cfg = 0xa9643c42; |
| 92 | + break; |
| 93 | + case 1: |
| 94 | + *data->cs0_cfg = 0x85033c42; |
| 95 | + break; |
| 96 | + case 2: |
| 97 | + *data->cs0_cfg = 0x80b23c42; |
| 98 | + break; |
| 99 | + case 3: |
| 100 | + *data->cs0_cfg = 0x80823c42; |
| 101 | + break; |
| 102 | + case 4: |
| 103 | + *data->cs0_cfg = 0x80403c42; |
| 104 | + break; |
| 105 | + } |
| 106 | + udelay(5); |
| 107 | |
| 108 | /* Transfer multiple of 2 bytes */ |
| 109 | if (rw == READ) |
| 110 | @@ -79,8 +148,24 @@ static unsigned int ixp4xx_mmio_data_xfe |
| 111 | words++; |
| 112 | } |
| 113 | |
| 114 | - udelay(100); |
| 115 | - *data->cs0_cfg |= 0x01; |
| 116 | + udelay(5); |
| 117 | + switch (pio_mask){ |
| 118 | + case 0: |
| 119 | + *data->cs0_cfg = 0x8a473c03; |
| 120 | + break; |
| 121 | + case 1: |
| 122 | + *data->cs0_cfg = 0x86433c03; |
| 123 | + break; |
| 124 | + case 2: |
| 125 | + *data->cs0_cfg = 0x82413c03; |
| 126 | + break; |
| 127 | + case 3: |
| 128 | + *data->cs0_cfg = 0x80823c03; |
| 129 | + break; |
| 130 | + case 4: |
| 131 | + *data->cs0_cfg = 0x80403c03; |
| 132 | + break; |
| 133 | + } |
| 134 | |
| 135 | return words << 1; |
| 136 | } |
target/linux/ixp4xx/patches-2.6.33/402-ixp4xx_gpiolib.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/common.c |
| 2 | @@ -36,6 +36,7 @@ |
| 3 | #include <asm/pgtable.h> |
| 4 | #include <asm/page.h> |
| 5 | #include <asm/irq.h> |
| 6 | +#include <asm/gpio.h> |
| 7 | |
| 8 | #include <asm/mach/map.h> |
| 9 | #include <asm/mach/irq.h> |
| 10 | @@ -375,12 +376,39 @@ static struct platform_device *ixp46x_de |
| 11 | unsigned long ixp4xx_exp_bus_size; |
| 12 | EXPORT_SYMBOL(ixp4xx_exp_bus_size); |
| 13 | |
| 14 | +static int ixp4xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) |
| 15 | +{ |
| 16 | + gpio_line_config(gpio, IXP4XX_GPIO_IN); |
| 17 | + return 0; |
| 18 | +} |
| 19 | +EXPORT_SYMBOL(ixp4xx_gpio_direction_input); |
| 20 | + |
| 21 | +static int ixp4xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int level) |
| 22 | +{ |
| 23 | + gpio_line_set(gpio, level); |
| 24 | + gpio_line_config(gpio, IXP4XX_GPIO_OUT); |
| 25 | + return 0; |
| 26 | +} |
| 27 | +EXPORT_SYMBOL(ixp4xx_gpio_direction_output); |
| 28 | + |
| 29 | +static struct gpio_chip ixp4xx_gpio_chip = { |
| 30 | + .label = "IXP4XX_GPIO_CHIP", |
| 31 | + .direction_input = ixp4xx_gpio_direction_input, |
| 32 | + .direction_output = ixp4xx_gpio_direction_output, |
| 33 | + .get = gpio_get_value, |
| 34 | + .set = gpio_set_value, |
| 35 | + .base = 0, |
| 36 | + .ngpio = 16, |
| 37 | +}; |
| 38 | + |
| 39 | void __init ixp4xx_sys_init(void) |
| 40 | { |
| 41 | ixp4xx_exp_bus_size = SZ_16M; |
| 42 | |
| 43 | platform_add_devices(ixp4xx_devices, ARRAY_SIZE(ixp4xx_devices)); |
| 44 | |
| 45 | + gpiochip_add(&ixp4xx_gpio_chip); |
| 46 | + |
| 47 | if (cpu_is_ixp46x()) { |
| 48 | int region; |
| 49 | |
| 50 | --- a/arch/arm/Kconfig |
| 51 | @@ -417,6 +417,7 @@ config ARCH_IXP4XX |
| 52 | select GENERIC_GPIO |
| 53 | select GENERIC_TIME |
| 54 | select GENERIC_CLOCKEVENTS |
| 55 | + select ARCH_REQUIRE_GPIOLIB |
| 56 | help |
| 57 | Support for Intel's IXP4XX (XScale) family of processors. |
| 58 | |
| 59 | --- a/arch/arm/mach-ixp4xx/include/mach/gpio.h |
| 60 | @@ -27,47 +27,31 @@ |
| 61 | |
| 62 | #include <linux/kernel.h> |
| 63 | #include <mach/hardware.h> |
| 64 | +#include <asm-generic/gpio.h> /* cansleep wrappers */ |
| 65 | |
| 66 | -static inline int gpio_request(unsigned gpio, const char *label) |
| 67 | -{ |
| 68 | - return 0; |
| 69 | -} |
| 70 | - |
| 71 | -static inline void gpio_free(unsigned gpio) |
| 72 | -{ |
| 73 | - might_sleep(); |
| 74 | - |
| 75 | - return; |
| 76 | -} |
| 77 | - |
| 78 | -static inline int gpio_direction_input(unsigned gpio) |
| 79 | -{ |
| 80 | - gpio_line_config(gpio, IXP4XX_GPIO_IN); |
| 81 | - return 0; |
| 82 | -} |
| 83 | - |
| 84 | -static inline int gpio_direction_output(unsigned gpio, int level) |
| 85 | -{ |
| 86 | - gpio_line_set(gpio, level); |
| 87 | - gpio_line_config(gpio, IXP4XX_GPIO_OUT); |
| 88 | - return 0; |
| 89 | -} |
| 90 | +#define NR_BUILTIN_GPIO 16 |
| 91 | |
| 92 | static inline int gpio_get_value(unsigned gpio) |
| 93 | { |
| 94 | - int value; |
| 95 | - |
| 96 | - gpio_line_get(gpio, &value); |
| 97 | - |
| 98 | - return value; |
| 99 | + if (gpio < NR_BUILTIN_GPIO) |
| 100 | + { |
| 101 | + int value; |
| 102 | + gpio_line_get(gpio, &value); |
| 103 | + return value; |
| 104 | + } |
| 105 | + else |
| 106 | + return __gpio_get_value(gpio); |
| 107 | } |
| 108 | |
| 109 | static inline void gpio_set_value(unsigned gpio, int value) |
| 110 | { |
| 111 | - gpio_line_set(gpio, value); |
| 112 | + if (gpio < NR_BUILTIN_GPIO) |
| 113 | + gpio_line_set(gpio, value); |
| 114 | + else |
| 115 | + __gpio_set_value(gpio, value); |
| 116 | } |
| 117 | |
| 118 | -#include <asm-generic/gpio.h> /* cansleep wrappers */ |
| 119 | +#define gpio_cansleep __gpio_cansleep |
| 120 | |
| 121 | extern int gpio_to_irq(int gpio); |
| 122 | extern int irq_to_gpio(unsigned int irq); |
target/linux/ixp4xx/patches-2.6.33/500-usr8200_support.patch |
| 1 | --- a/arch/arm/mach-ixp4xx/Kconfig |
| 2 | @@ -97,6 +97,14 @@ config MACH_SIDEWINDER |
| 3 | Engineering Sidewinder board. For more information on this |
| 4 | platform, see http://www.adiengineering.com |
| 5 | |
| 6 | +config MACH_USR8200 |
| 7 | + bool "USRobotics USR8200" |
| 8 | + select PCI |
| 9 | + help |
| 10 | + Say 'Y' here if you want your kernel to support the USRobotics |
| 11 | + USR8200 router board. For more information on this platform, see |
| 12 | + http://openwrt.org |
| 13 | + |
| 14 | config MACH_COMPEX |
| 15 | bool "Compex WP18 / NP18A" |
| 16 | select PCI |
| 17 | --- a/arch/arm/mach-ixp4xx/Makefile |
| 18 | @@ -25,6 +25,7 @@ obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt |
| 19 | obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o |
| 20 | obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o |
| 21 | obj-pci-$(CONFIG_MACH_MI424WR) += mi424wr-pci.o |
| 22 | +obj-pci-$(CONFIG_MACH_USR8200) += usr8200-pci.o |
| 23 | |
| 24 | obj-y += common.o |
| 25 | |
| 26 | @@ -49,6 +50,7 @@ obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv |
| 27 | obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o |
| 28 | obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o |
| 29 | obj-$(CONFIG_MACH_MI424WR) += mi424wr-setup.o |
| 30 | +obj-$(CONFIG_MACH_USR8200) += usr8200-setup.o |
| 31 | |
| 32 | obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o |
| 33 | obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o |
| 34 | --- /dev/null |
| 35 | @@ -0,0 +1,78 @@ |
| 36 | +/* |
| 37 | + * arch/arch/mach-ixp4xx/usr8200-pci.c |
| 38 | + * |
| 39 | + * PCI setup routines for USRobotics USR8200 |
| 40 | + * |
| 41 | + * Copyright (C) 2008 Peter Denison <openwrt@marshadder.org> |
| 42 | + * |
| 43 | + * based on pronghorn-pci.c |
| 44 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 45 | + * based on coyote-pci.c: |
| 46 | + * Copyright (C) 2002 Jungo Software Technologies. |
| 47 | + * Copyright (C) 2003 MontaVista Softwrae, Inc. |
| 48 | + * |
| 49 | + * Maintainer: Peter Denison <openwrt@marshadder.org> |
| 50 | + * |
| 51 | + * This program is free software; you can redistribute it and/or modify |
| 52 | + * it under the terms of the GNU General Public License version 2 as |
| 53 | + * published by the Free Software Foundation. |
| 54 | + * |
| 55 | + */ |
| 56 | + |
| 57 | +#include <linux/kernel.h> |
| 58 | +#include <linux/pci.h> |
| 59 | +#include <linux/init.h> |
| 60 | +#include <linux/irq.h> |
| 61 | + |
| 62 | +#include <asm/mach-types.h> |
| 63 | +#include <mach/hardware.h> |
| 64 | + |
| 65 | +#include <asm/mach/pci.h> |
| 66 | + |
| 67 | +void __init usr8200_pci_preinit(void) |
| 68 | +{ |
| 69 | + set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); |
| 70 | + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); |
| 71 | + set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); |
| 72 | + set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); |
| 73 | + set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); |
| 74 | + |
| 75 | + ixp4xx_pci_preinit(); |
| 76 | +} |
| 77 | + |
| 78 | +static int __init usr8200_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 79 | +{ |
| 80 | + if (slot == 14) |
| 81 | + return IRQ_IXP4XX_GPIO7; |
| 82 | + else if (slot == 15) |
| 83 | + return IRQ_IXP4XX_GPIO8; |
| 84 | + else if (slot == 16) { |
| 85 | + if (pin == 1) |
| 86 | + return IRQ_IXP4XX_GPIO11; |
| 87 | + else if (pin == 2) |
| 88 | + return IRQ_IXP4XX_GPIO10; |
| 89 | + else if (pin == 3) |
| 90 | + return IRQ_IXP4XX_GPIO9; |
| 91 | + else |
| 92 | + return -1; |
| 93 | + } else |
| 94 | + return -1; |
| 95 | +} |
| 96 | + |
| 97 | +struct hw_pci usr8200_pci __initdata = { |
| 98 | + .nr_controllers = 1, |
| 99 | + .preinit = usr8200_pci_preinit, |
| 100 | + .swizzle = pci_std_swizzle, |
| 101 | + .setup = ixp4xx_setup, |
| 102 | + .scan = ixp4xx_scan_bus, |
| 103 | + .map_irq = usr8200_map_irq, |
| 104 | +}; |
| 105 | + |
| 106 | +int __init usr8200_pci_init(void) |
| 107 | +{ |
| 108 | + if (machine_is_usr8200()) |
| 109 | + pci_common_init(&usr8200_pci); |
| 110 | + return 0; |
| 111 | +} |
| 112 | + |
| 113 | +subsys_initcall(usr8200_pci_init); |
| 114 | --- /dev/null |
| 115 | @@ -0,0 +1,212 @@ |
| 116 | +/* |
| 117 | + * arch/arm/mach-ixp4xx/usr8200-setup.c |
| 118 | + * |
| 119 | + * Board setup for the USRobotics USR8200 |
| 120 | + * |
| 121 | + * Copyright (C) 2008 Peter Denison <openwrt@marshadder.org> |
| 122 | + * |
| 123 | + * based on pronghorn-setup.c: |
| 124 | + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
| 125 | + * based on coyote-setup.c: |
| 126 | + * Copyright (C) 2003-2005 MontaVista Software, Inc. |
| 127 | + * |
| 128 | + * Author: Peter Denison <openwrt@marshadder.org> |
| 129 | + */ |
| 130 | + |
| 131 | +#include <linux/kernel.h> |
| 132 | +#include <linux/init.h> |
| 133 | +#include <linux/device.h> |
| 134 | +#include <linux/serial.h> |
| 135 | +#include <linux/tty.h> |
| 136 | +#include <linux/serial_8250.h> |
| 137 | +#include <linux/slab.h> |
| 138 | +#include <linux/types.h> |
| 139 | +#include <linux/memory.h> |
| 140 | +#include <linux/i2c-gpio.h> |
| 141 | +#include <linux/leds.h> |
| 142 | + |
| 143 | +#include <asm/setup.h> |
| 144 | +#include <mach/hardware.h> |
| 145 | +#include <asm/irq.h> |
| 146 | +#include <asm/mach-types.h> |
| 147 | +#include <asm/mach/arch.h> |
| 148 | +#include <asm/mach/flash.h> |
| 149 | + |
| 150 | +static struct flash_platform_data usr8200_flash_data = { |
| 151 | + .map_name = "cfi_probe", |
| 152 | + .width = 2, |
| 153 | +}; |
| 154 | + |
| 155 | +static struct resource usr8200_flash_resource = { |
| 156 | + .flags = IORESOURCE_MEM, |
| 157 | +}; |
| 158 | + |
| 159 | +static struct platform_device usr8200_flash = { |
| 160 | + .name = "IXP4XX-Flash", |
| 161 | + .id = 0, |
| 162 | + .dev = { |
| 163 | + .platform_data = &usr8200_flash_data, |
| 164 | + }, |
| 165 | + .num_resources = 1, |
| 166 | + .resource = &usr8200_flash_resource, |
| 167 | +}; |
| 168 | + |
| 169 | +static struct resource usr8200_uart_resources [] = { |
| 170 | + { |
| 171 | + .start = IXP4XX_UART2_BASE_PHYS, |
| 172 | + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 173 | + .flags = IORESOURCE_MEM |
| 174 | + }, |
| 175 | + { |
| 176 | + .start = IXP4XX_UART1_BASE_PHYS, |
| 177 | + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 178 | + .flags = IORESOURCE_MEM |
| 179 | + } |
| 180 | +}; |
| 181 | + |
| 182 | +static struct plat_serial8250_port usr8200_uart_data[] = { |
| 183 | + { |
| 184 | + .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 185 | + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 186 | + .irq = IRQ_IXP4XX_UART2, |
| 187 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 188 | + .iotype = UPIO_MEM, |
| 189 | + .regshift = 2, |
| 190 | + .uartclk = IXP4XX_UART_XTAL, |
| 191 | + }, |
| 192 | + { |
| 193 | + .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 194 | + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 195 | + .irq = IRQ_IXP4XX_UART1, |
| 196 | + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 197 | + .iotype = UPIO_MEM, |
| 198 | + .regshift = 2, |
| 199 | + .uartclk = IXP4XX_UART_XTAL, |
| 200 | + }, |
| 201 | + { }, |
| 202 | +}; |
| 203 | + |
| 204 | +static struct platform_device usr8200_uart = { |
| 205 | + .name = "serial8250", |
| 206 | + .id = PLAT8250_DEV_PLATFORM, |
| 207 | + .dev = { |
| 208 | + .platform_data = usr8200_uart_data, |
| 209 | + }, |
| 210 | + .num_resources = 2, |
| 211 | + .resource = usr8200_uart_resources, |
| 212 | +}; |
| 213 | + |
| 214 | +static struct gpio_led usr8200_led_pin[] = { |
| 215 | + { |
| 216 | + .name = "usr8200:usb1", |
| 217 | + .gpio = 0, |
| 218 | + .active_low = 1, |
| 219 | + }, |
| 220 | + { |
| 221 | + .name = "usr8200:usb2", |
| 222 | + .gpio = 1, |
| 223 | + .active_low = 1, |
| 224 | + }, |
| 225 | + { |
| 226 | + .name = "usr8200:ieee1394", |
| 227 | + .gpio = 2, |
| 228 | + .active_low = 1, |
| 229 | + }, |
| 230 | + { |
| 231 | + .name = "usr8200:internal", |
| 232 | + .gpio = 3, |
| 233 | + .active_low = 1, |
| 234 | + }, |
| 235 | + { |
| 236 | + .name = "usr8200:power", |
| 237 | + .gpio = 14, |
| 238 | + } |
| 239 | +}; |
| 240 | + |
| 241 | +static struct gpio_led_platform_data usr8200_led_data = { |
| 242 | + .num_leds = ARRAY_SIZE(usr8200_led_pin), |
| 243 | + .leds = usr8200_led_pin, |
| 244 | +}; |
| 245 | + |
| 246 | +static struct platform_device usr8200_led = { |
| 247 | + .name = "leds-gpio", |
| 248 | + .id = -1, |
| 249 | + .dev.platform_data = &usr8200_led_data, |
| 250 | +}; |
| 251 | + |
| 252 | +static struct eth_plat_info usr8200_plat_eth[] = { |
| 253 | + { /* NPEC - LAN with Marvell 88E6060 switch */ |
| 254 | + .phy = IXP4XX_ETH_PHY_MAX_ADDR, |
| 255 | + .phy_mask = 0x0F0000, |
| 256 | + .rxq = 4, |
| 257 | + .txreadyq = 21, |
| 258 | + }, { /* NPEB - WAN */ |
| 259 | + .phy = 9, |
| 260 | + .rxq = 3, |
| 261 | + .txreadyq = 20, |
| 262 | + } |
| 263 | +}; |
| 264 | + |
| 265 | +static struct platform_device usr8200_eth[] = { |
| 266 | + { |
| 267 | + .name = "ixp4xx_eth", |
| 268 | + .id = IXP4XX_ETH_NPEC, |
| 269 | + .dev.platform_data = usr8200_plat_eth, |
| 270 | + }, { |
| 271 | + .name = "ixp4xx_eth", |
| 272 | + .id = IXP4XX_ETH_NPEB, |
| 273 | + .dev.platform_data = usr8200_plat_eth + 1, |
| 274 | + } |
| 275 | +}; |
| 276 | + |
| 277 | +static struct resource usr8200_rtc_resources = { |
| 278 | + .flags = IORESOURCE_MEM |
| 279 | +}; |
| 280 | + |
| 281 | +static struct platform_device usr8200_rtc = { |
| 282 | + .name = "rtc7301", |
| 283 | + .id = 0, |
| 284 | + .num_resources = 1, |
| 285 | + .resource = &usr8200_rtc_resources, |
| 286 | +}; |
| 287 | + |
| 288 | +static struct platform_device *usr8200_devices[] __initdata = { |
| 289 | + &usr8200_flash, |
| 290 | + &usr8200_uart, |
| 291 | + &usr8200_led, |
| 292 | + &usr8200_eth[0], |
| 293 | + &usr8200_eth[1], |
| 294 | + &usr8200_rtc, |
| 295 | +}; |
| 296 | + |
| 297 | +static void __init usr8200_init(void) |
| 298 | +{ |
| 299 | + ixp4xx_sys_init(); |
| 300 | + |
| 301 | + usr8200_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 302 | + usr8200_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_16M - 1; |
| 303 | + |
| 304 | + usr8200_rtc_resources.start = IXP4XX_EXP_BUS_BASE(2); |
| 305 | + usr8200_rtc_resources.end = IXP4XX_EXP_BUS_BASE(2) + 0x01ff; |
| 306 | + |
| 307 | + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; |
| 308 | + *IXP4XX_EXP_CS2 = 0x3fff000 | IXP4XX_EXP_BUS_SIZE(0) | IXP4XX_EXP_BUS_WR_EN | |
| 309 | + IXP4XX_EXP_BUS_CS_EN | IXP4XX_EXP_BUS_BYTE_EN; |
| 310 | + *IXP4XX_GPIO_GPCLKR = 0x01100000; |
| 311 | + |
| 312 | + /* configure button as input */ |
| 313 | + gpio_line_config(12, IXP4XX_GPIO_IN); |
| 314 | + |
| 315 | + platform_add_devices(usr8200_devices, ARRAY_SIZE(usr8200_devices)); |
| 316 | +} |
| 317 | + |
| 318 | +MACHINE_START(USR8200, "USRobotics USR8200") |
| 319 | + /* Maintainer: Peter Denison <openwrt@marshadder.org> */ |
| 320 | + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, |
| 321 | + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc, |
| 322 | + .map_io = ixp4xx_map_io, |
| 323 | + .init_irq = ixp4xx_init_irq, |
| 324 | + .timer = &ixp4xx_timer, |
| 325 | + .boot_params = 0x0100, |
| 326 | + .init_machine = usr8200_init, |
| 327 | +MACHINE_END |
| 328 | --- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h |
| 329 | @@ -43,7 +43,7 @@ static __inline__ void __arch_decomp_set |
| 330 | if (machine_is_adi_coyote() || machine_is_gtwx5715() || |
| 331 | machine_is_gateway7001() || machine_is_wg302v2() || |
| 332 | machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2() || |
| 333 | - machine_is_tw5334()) |
| 334 | + machine_is_tw5334() || machine_is_usr8200()) |
| 335 | uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; |
| 336 | else |
| 337 | uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; |