Date:2010-07-01 21:07:27 (13 years 8 months ago)
Author:florian
Commit:382532ed9f06abe18ecf4b9c7015b65574f5b123
Message:[au1000] fix PCI, thanks br1, put back 2.6.32.14 support by default

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22033 3c298f89-4303-0410-b956-a3cf2f4a3e73
Files: target/linux/au1000/Makefile (1 diff)
target/linux/au1000/patches-2.6.32/005-mtx1_fix_pci.patch (1 diff)
target/linux/au1000/patches-2.6.32/005-revert_mtx1_board_gpiolib.patch (1 diff)

Change Details

target/linux/au1000/Makefile
1212FEATURES:=jffs2 usb pci
1313SUBTARGETS=au1500 au1550
1414
15LINUX_VERSION:=2.6.30.10
15LINUX_VERSION:=2.6.32.14
1616
1717include $(INCLUDE_DIR)/target.mk
1818DEFAULT_PACKAGES += wpad-mini yamonenv
target/linux/au1000/patches-2.6.32/005-mtx1_fix_pci.patch
1
2
3diff --git a/arch/mips/alchemy/mtx-1/board_setup.c
4b/arch/mips/alchemy/mtx-1/board_setup.c
5index 45b61c9..17140ac 100644
6--- a/arch/mips/alchemy/mtx-1/board_setup.c
7@@ -56,8 +56,6 @@ void __init board_setup(void)
8     }
9 #endif
10
11- alchemy_gpio2_enable();
12-
13 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
14     /* Enable USB power switch */
15     alchemy_gpio_direction_output(204, 0);
16@@ -92,20 +90,12 @@ void __init board_setup(void)
17 int
18 mtx1_pci_idsel(unsigned int devsel, int assert)
19 {
20-#define MTX_IDSEL_ONLY_0_AND_3 0
21-#if MTX_IDSEL_ONLY_0_AND_3
22- if (devsel != 0 && devsel != 3) {
23- printk(KERN_ERR "*** not 0 or 3\n");
24- return 0;
25- }
26-#endif
27-
28     if (assert && devsel != 0)
29         /* Suppress signal to Cardbus */
30         gpio_set_value(1, 0); /* set EXT_IO3 OFF */
31     else
32         gpio_set_value(1, 1); /* set EXT_IO3 ON */
33
34- au_sync_udelay(1);
35+ udelay(1);
36     return 1;
37 }
target/linux/au1000/patches-2.6.32/005-revert_mtx1_board_gpiolib.patch
1commit 1cd692621e6d4b1f707039ea0b4e5ad3143312fb
2Author: Florian Fainelli <ffainelli@freebox.fr>
3Date: Thu Jul 1 10:02:53 2010 +0200
4
5    Revert "MIPS: Alchemy: MTX-1: Use linux gpio api."
6
7    This reverts commit b312ab3b5a86c8be5753cdf32ea429ba80651298.
8
9diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
10index cc32c69..8ed1ae1 100644
11+++ b/arch/mips/alchemy/mtx-1/board_setup.c
12@@ -28,7 +28,6 @@
13  * 675 Mass Ave, Cambridge, MA 02139, USA.
14  */
15
16-#include <linux/gpio.h>
17 #include <linux/init.h>
18
19 #include <asm/mach-au1x00/au1000.h>
20@@ -56,11 +55,10 @@ void __init board_setup(void)
21     }
22 #endif
23
24- alchemy_gpio2_enable();
25-
26 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
27     /* Enable USB power switch */
28- alchemy_gpio_direction_output(204, 0);
29+ au_writel(au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR);
30+ au_writel(0x100000, GPIO2_OUTPUT);
31 #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
32
33 #ifdef CONFIG_PCI
34@@ -76,14 +74,14 @@ void __init board_setup(void)
35
36     /* Initialize GPIO */
37     au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
38- alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
39- alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
40- alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
41- alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */
42+ au_writel(0x00000001, SYS_OUTPUTCLR); /* set M66EN (PCI 66MHz) to OFF */
43+ au_writel(0x00000008, SYS_OUTPUTSET); /* set PCI CLKRUN# to OFF */
44+ au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
45+ au_writel(0x00000020, SYS_OUTPUTCLR); /* set eth PHY TX_ER to OFF */
46
47     /* Enable LED and set it to green */
48- alchemy_gpio_direction_output(211, 1); /* green on */
49- alchemy_gpio_direction_output(212, 0); /* red off */
50+ au_writel(au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR);
51+ au_writel(0x18000800, GPIO2_OUTPUT);
52
53     board_pci_idsel = mtx1_pci_idsel;
54
55@@ -103,10 +101,10 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
56
57     if (assert && devsel != 0)
58         /* Suppress signal to Cardbus */
59- gpio_set_value(1, 0); /* set EXT_IO3 OFF */
60+ au_writel(0x00000002, SYS_OUTPUTCLR); /* set EXT_IO3 OFF */
61     else
62- gpio_set_value(1, 1); /* set EXT_IO3 ON */
63-
64+ au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
65     au_sync_udelay(1);
66     return 1;
67 }
68+

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