IEEE 802.15.4 subsystem
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IEEE 802.15.4 subsystem Commit Details
Date: | 2010-09-05 04:14:57 (13 years 6 months ago) |
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Author: | Werner Almesberger |
Commit: | 86e556ce92af39a3353e0c6494ba20de59d47d4c |
Message: | First part of the board bringup: power and clock. - atusd/ERRATA: variations of the circuit being debugged from the design - tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable the board and (in the future) establish communication - atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative load from scope probe |
Files: |
atusd/ERRATA (1 diff) atusd/sim/clk.sch (1 diff) atusd/tools/Makefile (1 diff) atusd/tools/lib/atusd.c (1 diff) atusd/tools/try.c (1 diff) |
Change Details
atusd/ERRATA | ||
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1 | - changed C7 to 1 nF to debug a signal attenuation problem. Turned out to be | |
2 | a bad trace. According to simulations, 22 pF should be more than enough. | |
3 | ||
4 | - added wire connecting uSD-side ground plane to ground plane at outer edge, | |
5 | to improve CLK signal return. (Probably unnecessary, too.) |
atusd/sim/clk.sch | ||
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1 | <Qucs Schematic 0.0.15> | |
2 | <Properties> | |
3 | <View=0,0,1010,882,1,0,0> | |
4 | <Grid=10,10,1> | |
5 | <DataSet=clk.dat> | |
6 | <DataDisplay=clk.dpl> | |
7 | <OpenDisplay=1> | |
8 | <showFrame=0> | |
9 | <FrameText0=Title> | |
10 | <FrameText1=Drawn By:> | |
11 | <FrameText2=Date:> | |
12 | <FrameText3=Revision:> | |
13 | </Properties> | |
14 | <Symbol> | |
15 | </Symbol> | |
16 | <Components> | |
17 | <GND * 1 560 480 0 0 0 0> | |
18 | <.DC DC1 1 90 40 0 36 0 0 "26.85" 0 "0.001" 0 "1 pA" 0 "1 uV" 0 "no" 0 "150" 0 "no" 0 "none" 0 "CroutLU" 0> | |
19 | <Vrect V2 1 560 390 18 -26 0 1 "3.3 V" 1 "33 ns" 1 "33 ns" 1 "1 ns" 0 "1 ns" 0 "0 ns" 0> | |
20 | <.TR TR1 1 100 120 0 57 0 0 "lin" 1 "0" 1 "0.1 us" 1 "9991" 0 "Trapezoidal" 0 "2" 0 "1 ns" 0 "1e-16" 0 "150" 0 "0.001" 0 "1 pA" 0 "1 uV" 0 "26.85" 0 "1e-3" 0 "1e-6" 0 "1" 0 "CroutLU" 0 "no" 0 "yes" 0 "0" 0> | |
21 | <R R3 1 490 260 -26 15 0 0 "100 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "european" 0> | |
22 | <GND * 1 420 480 0 0 0 0> | |
23 | <C C2 1 420 370 17 -26 0 1 "50 pF" 1 "" 0 "neutral" 0> | |
24 | <GND * 1 280 480 0 0 0 0> | |
25 | <R R1 1 280 330 15 -26 0 1 "56 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "european" 0> | |
26 | <R R2 1 280 430 15 -26 0 1 "10 kOhm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "european" 0> | |
27 | <C C1 1 350 260 -26 17 0 0 "22 pF" 1 "" 0 "neutral" 0> | |
28 | </Components> | |
29 | <Wires> | |
30 | <520 260 560 260 "" 0 0 0 ""> | |
31 | <560 260 560 360 "" 0 0 0 ""> | |
32 | <560 420 560 480 "" 0 0 0 ""> | |
33 | <420 400 420 480 "" 0 0 0 ""> | |
34 | <420 260 460 260 "" 0 0 0 ""> | |
35 | <420 260 420 340 "" 0 0 0 ""> | |
36 | <380 260 420 260 "Vmeas" 350 140 39 ""> | |
37 | <280 360 280 400 "Vout" 170 330 17 ""> | |
38 | <280 260 280 300 "" 0 0 0 ""> | |
39 | <280 260 320 260 "" 0 0 0 ""> | |
40 | <280 460 280 480 "" 0 0 0 ""> | |
41 | <560 260 560 260 "Vin" 590 200 0 ""> | |
42 | </Wires> | |
43 | <Diagrams> | |
44 | <Rect 120 752 719 212 3 #c0c0c0 1 00 1 0 0.2 1 1 -0.1 0.5 1.1 1 -0.1 0.5 1.1 315 0 225 "" "" ""> | |
45 | <"Vin.Vt" #0000ff 0 3 0 0 0> | |
46 | <"Vmeas.Vt" #ff0000 0 3 0 0 0> | |
47 | <"Vout.Vt" #ff00ff 0 3 0 0 0> | |
48 | </Rect> | |
49 | <Rect 670 480 278 250 3 #c0c0c0 1 00 1 0 0.2 1 1 -0.1 0.5 1.1 1 -0.1 0.5 1.1 315 0 225 "" "" ""> | |
50 | <"Vout.Vt" #0000ff 0 3 0 0 0> | |
51 | </Rect> | |
52 | </Diagrams> | |
53 | <Paintings> | |
54 | </Paintings> |
atusd/tools/Makefile | ||
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1 | CC=mipsel-openwrt-linux-gcc | |
2 | CFLAGS=-Wall | |
3 | ||
4 | MAIN = try | |
5 | OBJS = $(MAIN).c lib/atusd.o | |
6 | ||
7 | $(MAIN): $(OBJS) |
atusd/tools/lib/atusd.c | ||
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1 | #include <stdint.h> | |
2 | #include <stdlib.h> | |
3 | #include <stdio.h> | |
4 | #include <fcntl.h> | |
5 | #include <sys/mman.h> | |
6 | ||
7 | ||
8 | enum { | |
9 | VDD_OFF = 1 << 6, /* VDD disable, PD06 */ | |
10 | MxSx = 1 << 8, /* CMD, PD08 */ | |
11 | CLK = 1 << 9, /* CLK, PD09 */ | |
12 | SCLK = 1 << 10, /* DAT0, PD10 */ | |
13 | SLP_TR = 1 << 11, /* DAT1, PD11 */ | |
14 | IRQ = 1 << 12, /* DAT2, PD12 */ | |
15 | nSEL = 1 << 13, /* DAT3/CD, PD13 */ | |
16 | }; | |
17 | ||
18 | ||
19 | #define SOC_BASE 0x10000000 | |
20 | ||
21 | #define REG(n) (*(volatile uint32_t *) (dsc->mem+(n))) | |
22 | ||
23 | #define CGU(n) REG(0x00000+(n)) | |
24 | #define GPIO(n) REG(0x10000+(n)) | |
25 | #define MSC(n) REG(0x21000+(n)) | |
26 | ||
27 | #define PDDATS GPIO(0x314) /* port D data set */ | |
28 | #define PDDATC GPIO(0x318) /* port D data clear */ | |
29 | #define PDFUNS GPIO(0x344) /* port D function set */ | |
30 | #define PDFUNC GPIO(0x348) /* port D function clear */ | |
31 | #define PDDIRS GPIO(0x364) /* port D direction set */ | |
32 | #define PDDIRC GPIO(0x368) /* port D direction clear */ | |
33 | ||
34 | #define MSC_STRPCL MSC(0x00) /* Start/stop MMC/SD clock */ | |
35 | #define MSC_CLKRT MSC(0x08) /* MSC Clock Rate */ | |
36 | ||
37 | #define CLKGR CGU(0x0020) /* Clock Gate */ | |
38 | #define MSCCDR CGU(0x0068) /* MSC device clock divider */ | |
39 | ||
40 | ||
41 | #define PAGE_SIZE 4096 | |
42 | ||
43 | ||
44 | struct atusd_dsc { | |
45 | int fd; | |
46 | void *mem; | |
47 | }; | |
48 | ||
49 | ||
50 | struct atusd_dsc *atusd_open(void) | |
51 | { | |
52 | struct atusd_dsc *dsc; | |
53 | ||
54 | dsc = malloc(sizeof(*dsc)); | |
55 | if (!dsc) { | |
56 | perror("malloc"); | |
57 | exit(1); | |
58 | } | |
59 | ||
60 | dsc->fd = open("/dev/mem", O_RDWR); | |
61 | if (dsc->fd < 0) { | |
62 | perror("/dev/mem"); | |
63 | exit(1); | |
64 | } | |
65 | dsc->mem = mmap(NULL, PAGE_SIZE*3*16, PROT_READ | PROT_WRITE, | |
66 | MAP_SHARED, dsc->fd, SOC_BASE); | |
67 | if (dsc->mem == MAP_FAILED) { | |
68 | perror("mmap"); | |
69 | exit(1); | |
70 | } | |
71 | ||
72 | /* set the output levels */ | |
73 | PDDATS = nSEL | VDD_OFF; | |
74 | PDDATC = SCLK | SLP_TR; | |
75 | ||
76 | /* take the GPIOs away from the MMC controller */ | |
77 | PDFUNC = MxSx | SCLK | SLP_TR | IRQ | nSEL; | |
78 | PDFUNS = CLK; | |
79 | ||
80 | /* set the pin directions */ | |
81 | PDDIRC = IRQ; | |
82 | PDDIRS = MxSx | CLK | SCLK | SLP_TR | nSEL; | |
83 | ||
84 | /* enable power */ | |
85 | PDDATC = VDD_OFF; | |
86 | ||
87 | /* set the MSC clock to 316 MHz / 21 = 16 MHz */ | |
88 | MSCCDR = 20; | |
89 | /* | |
90 | * Enable the MSC clock. We need to do this before accessing any | |
91 | * registers of the MSC block ! | |
92 | */ | |
93 | CLKGR &= ~(1 << 7); | |
94 | /* bus clock = MSC clock / 1 */ | |
95 | MSC_CLKRT = 0; | |
96 | /* start MMC clock output */ | |
97 | MSC_STRPCL = 2; | |
98 | ||
99 | return dsc; | |
100 | } | |
101 | ||
102 | ||
103 | void atusd_close(struct atusd_dsc *dsc) | |
104 | { | |
105 | /* stop the MMC clock */ | |
106 | MSC_STRPCL = 1; | |
107 | ||
108 | /* cut the power */ | |
109 | PDDATS = VDD_OFF; | |
110 | ||
111 | /* make all MMC pins inputs */ | |
112 | PDDIRC = MxSx | CLK | SCLK | SLP_TR | IRQ | nSEL; | |
113 | } |
atusd/tools/try.c | ||
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1 | struct atusd_dsc; | |
2 | ||
3 | ||
4 | int main(void) | |
5 | { | |
6 | struct atusd_dsc *dsc; | |
7 | char tmp; | |
8 | ||
9 | dsc = atusd_open(); | |
10 | read(1, tmp, 1); | |
11 | atusd_close(dsc); | |
12 | ||
13 | return 0; | |
14 | } |