ubb-vga/ubb-vga.c |
35 | 35 | #include <sys/mman.h> |
36 | 36 | |
37 | 37 | |
| 38 | static uint8_t thres = 63; |
| 39 | |
| 40 | |
| 41 | /* ----- I/O pin assignment ------------------------------------------------ */ |
| 42 | |
| 43 | |
38 | 44 | #define DAT0 (1 << 10) |
39 | 45 | #define DAT1 (1 << 11) |
40 | 46 | #define DAT2 (1 << 12) |
... | ... | |
48 | 54 | #define HSYNC CMD |
49 | 55 | #define VSYNC DAT3 |
50 | 56 | |
51 | | #define TIMER 7 |
52 | | |
53 | 57 | |
54 | | #define PAGE_SIZE 4096 |
55 | | #define SOC_BASE 0x10000000 |
56 | | #define DEFAULT_COUNT (1000*1000) |
| 58 | /* ----- Ben hardware ------------------------------------------------------ */ |
57 | 59 | |
58 | 60 | |
59 | | static uint8_t thres = 63; |
| 61 | #define TIMER 7 |
60 | 62 | |
61 | 63 | |
62 | | /* ----- Ben hardware ------------------------------------------------------ */ |
| 64 | #define PAGE_SIZE 4096 |
| 65 | #define SOC_BASE 0x10000000 |
63 | 66 | |
64 | 67 | |
65 | 68 | static volatile uint32_t *icmr, *icmsr, *icmcr; |
... | ... | |
97 | 100 | |
98 | 101 | |
99 | 102 | /* |
100 | | * @@@ Disabling the LCD clock will halng operations that depend on the LCD |
| 103 | * @@@ Disabling the LCD clock will hang operations that depend on the LCD |
101 | 104 | * subsystem to advance. This includes the screen saver. |
102 | 105 | */ |
103 | 106 | |
... | ... | |
196 | 199 | } |
197 | 200 | |
198 | 201 | |
199 | | /* ----- Interface --------------------------------------------------------- */ |
200 | | |
201 | | |
202 | | void setup(void) |
203 | | { |
204 | | mlockall(MCL_CURRENT | MCL_FUTURE); |
205 | | ben_setup(); |
206 | | *pddirs = R | G | B | HSYNC | VSYNC; |
207 | | } |
208 | | |
209 | | |
210 | | static uint32_t pick(int set, int bit, uint32_t val) |
211 | | { |
212 | | return set == bit ? val >> 8 : 0; |
213 | | } |
214 | | |
215 | 202 | |
216 | | static uint32_t pattern(int set, int r, int g, int b) |
217 | | { |
218 | | return pick(set, r, R) | pick(set, g, G) | pick(set, b, B); |
219 | | } |
| 203 | /* ----- Prefetch and delay logic ------------------------------------------ */ |
220 | 204 | |
221 | 205 | |
222 | 206 | #define BURST 32 |
223 | 207 | |
224 | | #define PREFETCH_HSYNC 160 |
225 | | #define PREFETCH_HFRONT (160-PREFETCH_HSYNC) |
226 | | #define DELAY_HFRONT 30 |
227 | | #define DELAY_HBACK 40 |
228 | | //#define DELAY_VSYNC 3500 |
229 | | //#define DELAY_VFRONT 56000 |
230 | | //#define DELAY_VBACK 28000 |
231 | | #define DELAY_VFRONT 1500 |
232 | | #define DELAY_LINE 1800 |
233 | | #define DELAY_HSYNC 210 |
234 | | |
235 | 208 | |
236 | 209 | static inline void prefetch(const uint8_t *prefetch, int words) |
237 | 210 | { |
... | ... | |
244 | 217 | } |
245 | 218 | |
246 | 219 | |
| 220 | #define US(us) ((uint16_t) ((us)*112)) |
| 221 | |
| 222 | |
247 | 223 | static void until(uint16_t cycles) |
248 | 224 | { |
249 | 225 | while ((*tcnt & 0xffff) < cycles); |
250 | 226 | } |
251 | 227 | |
252 | | #define US(us) ((uint16_t) ((us)*112)) |
| 228 | |
| 229 | /* ----- Interface --------------------------------------------------------- */ |
| 230 | |
| 231 | |
| 232 | void setup(void) |
| 233 | { |
| 234 | mlockall(MCL_CURRENT | MCL_FUTURE); |
| 235 | ben_setup(); |
| 236 | *pddirs = R | G | B | HSYNC | VSYNC; |
| 237 | } |
| 238 | |
| 239 | |
| 240 | static uint32_t pick(int set, int bit, uint32_t val) |
| 241 | { |
| 242 | return set == bit ? val >> 8 : 0; |
| 243 | } |
| 244 | |
| 245 | |
| 246 | static uint32_t pattern(int set, int r, int g, int b) |
| 247 | { |
| 248 | return pick(set, r, R) | pick(set, g, G) | pick(set, b, B); |
| 249 | } |
| 250 | |
253 | 251 | |
254 | 252 | static void line(const uint8_t *line, const uint8_t *fetch) |
255 | 253 | { |
... | ... | |
284 | 282 | until(US(3.77)); |
285 | 283 | *pddats = HSYNC; |
286 | 284 | until(US(31.77)); |
287 | | until(US(36)); |
| 285 | until(US(36)); |
288 | 286 | } |
289 | 287 | } |
290 | 288 | |